nrf51: Add UICR writing support
[openocd.git] / tcl / target / am437x.cfg
1 source [find target/icepick.cfg]
2
3 if { [info exists CHIPNAME] } {
4 set _CHIPNAME $CHIPNAME
5 } else {
6 set _CHIPNAME am437x
7 }
8
9 #
10 # M3 DAP
11 #
12 if { [info exists M3_DAP_TAPID] } {
13 set _M3_DAP_TAPID $M3_DAP_TAPID
14 } else {
15 set _M3_DAP_TAPID 0x4b6b902f
16 }
17 jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
18 jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11"
19
20 #
21 # Cortex A9 DAP
22 #
23 if { [info exists DAP_TAPID] } {
24 set _DAP_TAPID $DAP_TAPID
25 } else {
26 set _DAP_TAPID 0x4b6b902f
27 }
28 jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
29 jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12"
30
31 #
32 # ICEpick-D (JTAG route controller)
33 #
34 if { [info exists JRC_TAPID] } {
35 set _JRC_TAPID $JRC_TAPID
36 } else {
37 set _JRC_TAPID 0x0b98c02f
38 }
39 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
40 jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
41 # some TCK tycles are required to activate the DEBUG power domain
42 jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
43
44 #
45 # Cortex A9 target
46 #
47 set _TARGETNAME $_CHIPNAME.cpu
48 target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap
49
50 # SRAM: 64K at 0x4030.0000; use the first 16K
51 $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000

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