tcl/target/ampere_emag.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #
   4 # OpenOCD Target Configuration for eMAG ARMv8 Processor
   5 #
   6 # Copyright (c) 2019-2021, Ampere Computing LLC
   7 #
   8
   9 #
  10 # Configure defaults for target
  11 # Can be overriden in board configuration file
  12 #
  13
  14 if { [info exists CHIPNAME] } {
  15         set _CHIPNAME $CHIPNAME
  16 } else {
  17         set _CHIPNAME emag
  18 }
  19
  20 if { [info exists NUMCORES] } {
  21         set _NUMCORES $NUMCORES
  22 } else {
  23         set _NUMCORES 32
  24 }
  25
  26 if { [info exists ENDIAN] } {
  27         set _ENDIAN $ENDIAN
  28 } else {
  29         set _ENDIAN little
  30 }
  31
  32 if { [info exists CPUTAPID ] } {
  33         set _CPUTAPID $CPUTAPID
  34 } else {
  35         set _CPUTAPID 0x4BA00477
  36 }
  37
  38 #
  39 # Configure JTAG TAP
  40 #
  41
  42 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id $_CPUTAPID
  43 set _TAPNAME $_CHIPNAME.cpu
  44
  45 set _DAPNAME ${_TAPNAME}_dap
  46 set _APNUM 1
  47 dap create $_DAPNAME -chain-position $_TAPNAME
  48 $_DAPNAME apsel $_APNUM
  49
  50 # Create the DAP AP0 MEM-AP AHB-AP target
  51 target create AHB mem_ap -endian $_ENDIAN -dap $_DAPNAME -ap-num 0
  52
  53 # Create the DAP AP1 MEM-AP APB-AP target
  54 target create APB mem_ap -endian $_ENDIAN -dap $_DAPNAME -ap-num 1
  55
  56 #
  57 # Configure target CPUs
  58 #
  59
  60 # Build string used to enable smp mode
  61 set _SMP_STR "target smp"
  62
  63 for {set _i 0} {$_i < $_NUMCORES} {incr _i} {
  64         # Format a string to reference which CPU target to use
  65         set _TARGETNAME [format "${_TAPNAME}_%02d" $_i]
  66
  67         # Create and configure Cross Trigger Interface (CTI) - required for halt and resume
  68         set _CTINAME $_TARGETNAME.cti
  69         cti create $_CTINAME -dap $_DAPNAME -ap-num $_APNUM -baseaddr [expr {0xFC020000 + ($_i << 20)}]
  70
  71         # Create the target
  72         target create $_TARGETNAME aarch64 -endian $_ENDIAN -dap $_DAPNAME -ap-num $_APNUM -cti $_CTINAME -coreid $_i
  73         set _SMP_STR "$_SMP_STR $_TARGETNAME"
  74
  75         # Clear CTI output/input enables that are not configured by OpenOCD for aarch64
  76         $_TARGETNAME configure -event examine-start [subst {
  77                 $_CTINAME write INEN0 0x00000000
  78                 $_CTINAME write INEN1 0x00000000
  79                 $_CTINAME write INEN2 0x00000000
  80                 $_CTINAME write INEN3 0x00000000
  81                 $_CTINAME write INEN4 0x00000000
  82                 $_CTINAME write INEN5 0x00000000
  83                 $_CTINAME write INEN6 0x00000000
  84                 $_CTINAME write INEN7 0x00000000
  85                 $_CTINAME write INEN8 0x00000000
  86
  87                 $_CTINAME write OUTEN2 0x00000000
  88                 $_CTINAME write OUTEN3 0x00000000
  89                 $_CTINAME write OUTEN4 0x00000000
  90                 $_CTINAME write OUTEN5 0x00000000
  91                 $_CTINAME write OUTEN6 0x00000000
  92                 $_CTINAME write OUTEN7 0x00000000
  93                 $_CTINAME write OUTEN8 0x00000000
  94         }]
  95
  96         # Enable OpenOCD HWTHREAD RTOS feature for GDB thread (CPU) selection support
  97         # This feature presents CPU cores ("hardware threads") in an SMP system as threads to GDB
  98         $_TARGETNAME configure -rtos hwthread
  99 }
 100 eval $_SMP_STR