tcl/target/at91sam4XXX.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #
   4 # script for ATMEL sam4, a Cortex-M4 chip
   5 #
   6
   7 #
   8 # sam4 devices can support both JTAG and SWD transports.
   9 #
  10 source [find target/swj-dp.tcl]
  11
  12 if { [info exists CHIPNAME] } {
  13    set _CHIPNAME $CHIPNAME
  14 } else {
  15    set _CHIPNAME sam4
  16 }
  17
  18 if { [info exists ENDIAN] } {
  19    set _ENDIAN $ENDIAN
  20 } else {
  21    set _ENDIAN little
  22 }
  23
  24 # Work-area is a space in RAM used for flash programming
  25 # By default use 64kB
  26 if { [info exists WORKAREASIZE] } {
  27    set _WORKAREASIZE $WORKAREASIZE
  28 } else {
  29    set _WORKAREASIZE 0x4000
  30 }
  31
  32 #jtag scan chain
  33 if { [info exists CPUTAPID] } {
  34    set _CPUTAPID $CPUTAPID
  35 } else {
  36    set _CPUTAPID 0x4ba00477
  37 }
  38
  39 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  40 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  41
  42 set _TARGETNAME $_CHIPNAME.cpu
  43 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
  44
  45 # 16K is plenty, the smallest chip has this much
  46 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  47
  48 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
  49 #
  50 # Since we may be running of an RC oscilator, we crank down the speed a
  51 # bit more to be on the safe side. Perhaps superstition, but if are
  52 # running off a crystal, we can run closer to the limit. Note
  53 # that there can be a pretty wide band where things are more or less stable.
  54
  55 adapter speed 500
  56
  57 adapter srst delay 100
  58 if {[using_jtag]} {
  59  jtag_ntrst_delay 100
  60 }
  61
  62 if {![using_hla]} {
  63    # if srst is not fitted use SYSRESETREQ to
  64    # perform a soft reset
  65    cortex_m reset_config sysresetreq
  66 }