tcl/target/at91sam4XXX.cfg

   1 #
   2 # script for ATMEL sam4, a CORTEX-M4 chip
   3 #
   4
   5 #
   6 # sam4 devices can support both JTAG and SWD transports.
   7 #
   8 source [find target/swj-dp.tcl]
   9
  10 if { [info exists CHIPNAME] } {
  11    set _CHIPNAME $CHIPNAME
  12 } else {
  13    set _CHIPNAME sam4
  14 }
  15
  16 if { [info exists ENDIAN] } {
  17    set _ENDIAN $ENDIAN
  18 } else {
  19    set _ENDIAN little
  20 }
  21
  22 # Work-area is a space in RAM used for flash programming
  23 # By default use 64kB
  24 if { [info exists WORKAREASIZE] } {
  25    set _WORKAREASIZE $WORKAREASIZE
  26 } else {
  27    set _WORKAREASIZE 0x4000
  28 }
  29
  30 #jtag scan chain
  31 if { [info exists CPUTAPID] } {
  32    set _CPUTAPID $CPUTAPID
  33 } else {
  34    set _CPUTAPID 0x4ba00477
  35 }
  36
  37 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  38
  39 set _TARGETNAME $_CHIPNAME.cpu
  40 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  41
  42 # 16K is plenty, the smallest chip has this much
  43 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  44
  45 $_TARGETNAME configure -event gdb-flash-erase-start {
  46     halt
  47 }
  48
  49 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
  50 #
  51 # Since we may be running of an RC oscilator, we crank down the speed a
  52 # bit more to be on the safe side. Perhaps superstition, but if are
  53 # running off a crystal, we can run closer to the limit. Note
  54 # that there can be a pretty wide band where things are more or less stable.
  55
  56 adapter_khz 500
  57
  58 adapter_nsrst_delay 100
  59 if {$using_jtag} {
  60  jtag_ntrst_delay 100
  61 }
  62
  63 # if srst is not fitted use SYSRESETREQ to
  64 # perform a soft reset
  65 cortex_m reset_config sysresetreq