2a7f90c5b0c82a7126ae541a5d13205b5de22ac1
[openocd.git] / tcl / target / at91sam7sx.cfg
1 #use combined on interfaces or targets that can't set TRST/SRST separately
2 reset_config srst_only srst_pulls_trst
3
4 if { [info exists CHIPNAME] } {
5 set _CHIPNAME $CHIPNAME
6 } else {
7 set _CHIPNAME at91sam7s
8 }
9
10 if { [info exists ENDIAN] } {
11 set _ENDIAN $ENDIAN
12 } else {
13 set _ENDIAN little
14 }
15
16 if { [info exists CPUTAPID ] } {
17 set _CPUTAPID $CPUTAPID
18 } else {
19 set _CPUTAPID 0x3f0f0f0f
20 }
21
22 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
23
24 set _TARGETNAME $_CHIPNAME.cpu
25
26 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
27 $_TARGETNAME configure -event reset-init {
28 soft_reset_halt
29 # RSTC_CR : Reset peripherals
30 mww 0xfffffd00 0xa5000004
31 # disable watchdog
32 mww 0xfffffd44 0x00008000
33 # enable user reset
34 mww 0xfffffd08 0xa5000001
35 # CKGR_MOR : enable the main oscillator
36 mww 0xfffffc20 0x00000601
37 sleep 10
38 # CKGR_PLLR: 96.1097 MHz
39 mww 0xfffffc2c 0x00481c0e
40 sleep 10
41 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
42 mww 0xfffffc30 0x00000007
43 sleep 10
44 # MC_FMR: flash mode (FWS=1,FMCN=73)
45 mww 0xffffff60 0x00490100
46 sleep 100
47 }
48
49 $_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
50
51 #flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
52 flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
53
54 # For more information about the configuration files, take a look at:
55 # openocd.texi

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