tcl/target/em357.cfg

   1 #
   2 # Target configuration for the Silicon Labs EM357 chips
   3 #
   4
   5 #
   6 # em357 family supports JTAG and SWD transports
   7 #
   8 source [find target/swj-dp.tcl]
   9
  10 if { [info exists CHIPNAME] } {
  11    set _CHIPNAME $CHIPNAME
  12 } else {
  13    set _CHIPNAME em357
  14 }
  15
  16 # Work-area is a space in RAM used for flash programming
  17 # By default use 4kB
  18 if { [info exists WORKAREASIZE] } {
  19    set _WORKAREASIZE $WORKAREASIZE
  20 } else {
  21    set _WORKAREASIZE 0x1000
  22 }
  23
  24 if { [info exists CPUTAPID] } {
  25    set _CPUTAPID $CPUTAPID
  26 } else {
  27    if { [using_jtag] } {
  28       set _CPUTAPID 0x3ba00477
  29    } else {
  30       set _CPUTAPID 0x1ba00477
  31    }
  32 }
  33
  34 if { [info exists BSTAPID] } {
  35    set _BSTAPID $BSTAPID
  36 } else {
  37   set _BSTAPID 0x069a962b
  38 }
  39
  40 if { [info exists CHIPNAME] } {
  41    set _CHIPNAME $CHIPNAME
  42 } else {
  43    set _CHIPNAME em358
  44 }
  45
  46 if { [info exists FLASHSIZE] } {
  47     set _FLASHSIZE $FLASHSIZE
  48 } else {
  49     set _FLASHSIZE 0x30000
  50 }
  51
  52 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  53 if { [using_jtag] } {
  54     swj_newdap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf
  55 }
  56
  57 set _TARGETNAME $_CHIPNAME.cpu
  58 target create $_TARGETNAME cortex_m -endian little -chain-position $_TARGETNAME
  59
  60 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  61
  62 set _FLASHNAME $_CHIPNAME.flash
  63 flash bank $_FLASHNAME em357 0x08000000 $_FLASHSIZE 0 0 $_TARGETNAME
  64
  65 if { ![using_hla]} {
  66 # according to errata, we need to use vectreset rather than sysresetreq to avoid lockup
  67 # There is a bug in the chip, which means that when using external debuggers the chip
  68 # may lock up in certain CPU clock modes. Affected modes are operating the CPU at
  69 # 24MHz derived from the 24MHz crystal, or 12MHz derived from the high frequency RC
  70 # oscillator. If an external debugger tool asserts SYSRESETREQ, the chip will lock up and
  71 # require a pin reset or power cycle.
  72 #
  73 # for details, refer to:
  74 # http://www.silabs.com/Support%20Documents/TechnicalDocs/EM35x-Errata.pdf
  75     cortex_m reset_config vectreset
  76 }