jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / tcl / target / esp32.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2 #
3 # The ESP32 only supports JTAG.
4 transport select jtag
5
6 if { [info exists CHIPNAME] } {
7 set _CHIPNAME $CHIPNAME
8 } else {
9 set _CHIPNAME esp32
10 }
11
12 if { [info exists CPUTAPID] } {
13 set _CPUTAPID $CPUTAPID
14 } else {
15 set _CPUTAPID 0x120034e5
16 }
17
18 if { [info exists ESP32_ONLYCPU] } {
19 set _ONLYCPU $ESP32_ONLYCPU
20 } else {
21 set _ONLYCPU 2
22 }
23
24 if { [info exists ESP32_FLASH_VOLTAGE] } {
25 set _FLASH_VOLTAGE $ESP32_FLASH_VOLTAGE
26 } else {
27 set _FLASH_VOLTAGE 3.3
28 }
29
30 set _CPU0NAME cpu0
31 set _CPU1NAME cpu1
32 set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME
33 set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME
34
35 jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 -expected-id $_CPUTAPID
36 if { $_ONLYCPU != 1 } {
37 jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -expected-id $_CPUTAPID
38 } else {
39 jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -disable -expected-id $_CPUTAPID
40 }
41
42 # PRO-CPU
43 target create $_TARGETNAME_0 $_CHIPNAME -endian little -chain-position $_TARGETNAME_0 -coreid 0
44 # APP-CPU
45 if { $_ONLYCPU != 1 } {
46 target create $_TARGETNAME_1 $_CHIPNAME -endian little -chain-position $_TARGETNAME_1 -coreid 1
47 target smp $_TARGETNAME_0 $_TARGETNAME_1
48 }
49
50 $_TARGETNAME_0 esp32 flashbootstrap $_FLASH_VOLTAGE
51 $_TARGETNAME_0 xtensa maskisr on
52 $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
53 $_TARGETNAME_0 configure -event reset-assert-post { soft_reset_halt }
54
55 $_TARGETNAME_0 configure -event gdb-attach {
56 $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
57 # necessary to auto-probe flash bank when GDB is connected
58 halt 1000
59 }
60
61 if { $_ONLYCPU != 1 } {
62 $_TARGETNAME_1 configure -event gdb-attach {
63 $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
64 # necessary to auto-probe flash bank when GDB is connected
65 halt 1000
66 }
67 $_TARGETNAME_1 configure -event reset-assert-post { soft_reset_halt }
68 }
69
70 gdb_breakpoint_override hard

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)