tcl/target/k1921vk01t.cfg

   1 # K1921VK01T
   2 # http://niiet.ru/chips/nis?id=354
   3
   4 source [find target/swj-dp.tcl]
   5 source [find mem_helper.tcl]
   6
   7 if { [info exists CHIPNAME] } {
   8    set _CHIPNAME $CHIPNAME
   9 } else {
  10    set _CHIPNAME k1921vk01t
  11 }
  12
  13 set _ENDIAN little
  14
  15 # Work-area is a space in RAM used for flash programming
  16 if { [info exists WORKAREASIZE] } {
  17    set _WORKAREASIZE $WORKAREASIZE
  18 } else {
  19    set _WORKAREASIZE 0x10000
  20 }
  21
  22 #jtag scan chain
  23 if { [info exists CPUTAPID] } {
  24    set _CPUTAPID $CPUTAPID
  25 } else {
  26    if { [using_jtag] } {
  27       set _CPUTAPID 0x4ba00477
  28    } {
  29       # SWD IDCODE
  30       set _CPUTAPID 0x2ba01477
  31    }
  32 }
  33 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  34 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  35
  36 set _TARGETNAME $_CHIPNAME.cpu
  37 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
  38
  39 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  40
  41 flash bank $_CHIPNAME.flash niietcm4 0 0 0 0 $_TARGETNAME
  42
  43 adapter_khz 2000
  44
  45 adapter_nsrst_delay 100
  46 if {[using_jtag]} {
  47    jtag_ntrst_delay 100
  48 }
  49
  50 reset_config srst_nogate
  51
  52 if {![using_hla]} {
  53    # if srst is not fitted use SYSRESETREQ to
  54    # perform a soft reset
  55    cortex_m reset_config sysresetreq
  56 }