jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / tcl / target / k1921vk01t.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # K1921VK01T
4 # http://niiet.ru/chips/nis?id=354
5
6 source [find target/swj-dp.tcl]
7 source [find mem_helper.tcl]
8
9 if { [info exists CHIPNAME] } {
10 set _CHIPNAME $CHIPNAME
11 } else {
12 set _CHIPNAME k1921vk01t
13 }
14
15 set _ENDIAN little
16
17 # Work-area is a space in RAM used for flash programming
18 if { [info exists WORKAREASIZE] } {
19 set _WORKAREASIZE $WORKAREASIZE
20 } else {
21 set _WORKAREASIZE 0x10000
22 }
23
24 #jtag scan chain
25 if { [info exists CPUTAPID] } {
26 set _CPUTAPID $CPUTAPID
27 } else {
28 if { [using_jtag] } {
29 set _CPUTAPID 0x4ba00477
30 } {
31 # SWD IDCODE
32 set _CPUTAPID 0x2ba01477
33 }
34 }
35 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
36 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
37
38 set _TARGETNAME $_CHIPNAME.cpu
39 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
40
41 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
42
43 flash bank $_CHIPNAME.flash niietcm4 0 0 0 0 $_TARGETNAME
44
45 adapter speed 2000
46
47 adapter srst delay 100
48 if {[using_jtag]} {
49 jtag_ntrst_delay 100
50 }
51
52 reset_config srst_nogate
53
54 if {![using_hla]} {
55 # if srst is not fitted use SYSRESETREQ to
56 # perform a soft reset
57 cortex_m reset_config sysresetreq
58 }

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