niietcm4: support for NIIET's Cortex-M4 microcontrollers
[openocd.git] / tcl / target / k1921vk01t.cfg
1 # K1921VK01T
2 # http://niiet.ru/chips/nis?id=354
3
4 source [find target/swj-dp.tcl]
5 source [find mem_helper.tcl]
6
7 if { [info exists CHIPNAME] } {
8 set _CHIPNAME $CHIPNAME
9 } else {
10 set _CHIPNAME k1921vk01t
11 }
12
13 set _ENDIAN little
14
15 # Work-area is a space in RAM used for flash programming
16 if { [info exists WORKAREASIZE] } {
17 set _WORKAREASIZE $WORKAREASIZE
18 } else {
19 set _WORKAREASIZE 0x10000
20 }
21
22 #jtag scan chain
23 if { [info exists CPUTAPID] } {
24 set _CPUTAPID $CPUTAPID
25 } else {
26 if { [using_jtag] } {
27 set _CPUTAPID 0x410fc241
28 } {
29 # SWD IDCODE
30 set _CPUTAPID 0x2ba01477
31 }
32 }
33 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
34
35 set _TARGETNAME $_CHIPNAME.cpu
36 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
37
38 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
39
40 flash bank $_CHIPNAME.flash niietcm4 0 0 0 0 $_TARGETNAME
41
42 adapter_khz 2000
43
44 adapter_nsrst_delay 100
45 if {[using_jtag]} {
46 jtag_ntrst_delay 100
47 }
48
49 reset_config srst_nogate
50
51 if {![using_hla]} {
52 # if srst is not fitted use SYSRESETREQ to
53 # perform a soft reset
54 cortex_m reset_config sysresetreq
55 }

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