tcl/target/kl25.cfg

   1 #
   2 # Freescale Kinetis KL25 devices
   3 #
   4
   5 #
   6 # KL25 devices support both JTAG and SWD transports.
   7 #
   8 source [find target/swj-dp.tcl]
   9
  10 if { [info exists CHIPNAME] } {
  11     set _CHIPNAME $CHIPNAME
  12 } else {
  13     set _CHIPNAME kl25
  14 }
  15
  16 if { [info exists ENDIAN] } {
  17     set _ENDIAN $ENDIAN
  18 } else {
  19     set _ENDIAN little
  20 }
  21
  22 # Work-area is a space in RAM used for flash programming
  23 # By default use 4kB
  24 if { [info exists WORKAREASIZE] } {
  25    set _WORKAREASIZE $WORKAREASIZE
  26 } else {
  27    set _WORKAREASIZE 0x1000
  28 }
  29
  30 if { [info exists CPUTAPID] } {
  31     set _CPUTAPID $CPUTAPID
  32 } else {
  33     set _CPUTAPID 0x0bc11477
  34 }
  35
  36 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  37
  38 set _TARGETNAME $_CHIPNAME.cpu
  39 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_CHIPNAME.cpu
  40
  41 # It is important that "kinetis mdm check_security" is called for
  42 # 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
  43 # causes "kinetis mdm check_security" to fail the first time openocd
  44 # calls it when it tries to connect after the CPU has been power-cycled.
  45 $_CHIPNAME.cpu configure -event examine-end {
  46         kinetis mdm check_security
  47 }
  48
  49 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  50
  51 set _FLASHNAME $_CHIPNAME.flash
  52 flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
  53
  54 # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
  55 # specifies up to 1MHz for VLPR mode.
  56 adapter_khz 1000
  57
  58 if {![using_hla]} {
  59    # if srst is not fitted use SYSRESETREQ to
  60    # perform a soft reset
  61    cortex_m reset_config sysresetreq
  62 }
  63
  64 $_TARGETNAME configure -event reset-init {
  65     # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
  66     # specifies up to 24MHz for run mode; Table 17 of Sub-Family Data
  67     # Sheet rev4 lists 25MHz as the maximum frequency.
  68     adapter_khz 24000
  69 }