tcl/target/lpc4350.cfg

   1 source [find target/swj-dp.tcl]
   2
   3 adapter speed 500
   4
   5 if { [info exists CHIPNAME] } {
   6         set _CHIPNAME $CHIPNAME
   7 } else {
   8         set _CHIPNAME lpc4350
   9 }
  10
  11 #
  12 # M4 JTAG mode TAP
  13 #
  14 if { [info exists M4_JTAG_TAPID] } {
  15         set _M4_JTAG_TAPID $M4_JTAG_TAPID
  16 } else {
  17         set _M4_JTAG_TAPID 0x4ba00477
  18 }
  19
  20 #
  21 # M4 SWD mode TAP
  22 #
  23 if { [info exists M4_SWD_TAPID] } {
  24         set _M4_SWD_TAPID $M4_SWD_TAPID
  25 } else {
  26         set _M4_SWD_TAPID 0x2ba01477
  27 }
  28
  29 if { [using_jtag] } {
  30         set _M4_TAPID $_M4_JTAG_TAPID
  31 } {
  32         set _M4_TAPID $_M4_SWD_TAPID
  33 }
  34
  35 #
  36 # M0 TAP
  37 #
  38 if { [info exists M0_JTAG_TAPID] } {
  39         set _M0_JTAG_TAPID $M0_JTAG_TAPID
  40 } else {
  41         set _M0_JTAG_TAPID 0x0ba01477
  42 }
  43
  44 swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
  45                                 -expected-id $_M4_TAPID
  46 dap create $_CHIPNAME.m4.dap -chain-position $_CHIPNAME.m4
  47 target create $_CHIPNAME.m4 cortex_m -dap $_CHIPNAME.m4.dap
  48
  49 if { [using_jtag] } {
  50         swj_newdap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
  51                                 -expected-id $_M0_JTAG_TAPID
  52         dap create $_CHIPNAME.m0.dap -chain-position $_CHIPNAME.m0
  53         target create $_CHIPNAME.m0 cortex_m -dap $_CHIPNAME.m0.dap
  54 }
  55
  56 # LPC4350 has 96+32 KB SRAM
  57 if { [info exists WORKAREASIZE] } {
  58         set _WORKAREASIZE $WORKAREASIZE
  59 } else {
  60         set _WORKAREASIZE 0x20000
  61 }
  62 $_CHIPNAME.m4 configure -work-area-phys 0x10000000 \
  63                         -work-area-size $_WORKAREASIZE -work-area-backup 0
  64
  65 if {![using_hla]} {
  66    # on this CPU we should use VECTRESET to perform a soft reset and
  67    # manually reset the periphery
  68    # SRST or SYSRESETREQ disable the debug interface for the time of
  69    # the reset and will not fit our requirements for a consistent debug
  70    # session
  71    cortex_m reset_config vectreset
  72 }