tcl/target/omap2420.cfg

   1 # Texas Instruments OMAP 2420
   2 #       http://www.ti.com/omap
   3
   4 if { [info exists CHIPNAME] } {
   5    set  _CHIPNAME $CHIPNAME
   6 } else {
   7    set  _CHIPNAME omap2420
   8 }
   9 if { [info exists ENDIAN] } {
  10    set  _ENDIAN $ENDIAN
  11 } else {
  12    set  _ENDIAN little
  13 }
  14
  15 # NOTE: likes slowish clock on reset (1.5 MBit/s or less) or use RCLK
  16
  17 # Subsidiary TAP:  ARM7TDMIr4 plus imaging ... must add via ICEpick (addr 6).
  18 jtag newtap $_CHIPNAME iva -irlen 4 -ircapture 0x1 -irmask 0x3f -disable
  19
  20 # Subsidiary TAP: C55x DSP ... must add via ICEpick (addr 2).
  21 jtag newtap $_CHIPNAME dsp -irlen 38 -ircapture 0x1 -irmask 0x3f -disable
  22
  23 # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
  24 if { [info exists ETB_TAPID ] } {
  25    set _ETB_TAPID $ETB_TAPID
  26 } else {
  27    set _ETB_TAPID 0x2b900f0f
  28 }
  29 jtag newtap $_CHIPNAME etb -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_ETB_TAPID
  30
  31 # Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
  32 if { [info exists CPU_TAPID ] } {
  33    set _CPU_TAPID $CPU_TAPID
  34 } else {
  35    set _CPU_TAPID 0x07b3602f
  36 }
  37 jtag newtap $_CHIPNAME arm -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPU_TAPID
  38
  39 # Primary TAP: ICEpick-B (JTAG route controller) and boundary scan
  40 if { [info exists JRC_TAPID ] } {
  41    set _JRC_TAPID $JRC_TAPID
  42 } else {
  43    set _JRC_TAPID 0x01ce4801
  44 }
  45 jtag newtap $_CHIPNAME jrc -irlen 2 -ircapture 0x1 -irmask 0x3 -expected-id $_JRC_TAPID
  46
  47 # GDB target:  the ARM.
  48 set _TARGETNAME $_CHIPNAME.arm
  49 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
  50
  51 # scratch:  framebuffer, may be initially unavailable in some chips
  52 $_TARGETNAME configure -work-area-phys 0x40210000
  53 $_TARGETNAME configure -work-area-size 0x00081000
  54 $_TARGETNAME configure -work-area-backup 0
  55
  56 # trace setup
  57 # REVISIT ... as of 12-June-2009, OpenOCD's ETM code can't talk to ARM11 cores.
  58 #etm config $_TARGETNAME 16 normal full etb
  59 #etb config $_TARGETNAME $_CHIPNAME.etb