jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / tcl / target / omap2420.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # Texas Instruments OMAP 2420
4 # http://www.ti.com/omap
5 # as seen in Nokia N8x0 tablets
6
7 if { [info exists CHIPNAME] } {
8 set _CHIPNAME $CHIPNAME
9 } else {
10 set _CHIPNAME omap2420
11 }
12
13 # NOTE: likes slowish clock on reset (1.5 MBit/s or less) or use RCLK
14 reset_config srst_nogate
15
16 # Subsidiary TAP: ARM7TDMIr4 plus imaging ... must add via ICEpick (addr 6).
17 jtag newtap $_CHIPNAME iva -irlen 4 -disable
18
19 # Subsidiary TAP: C55x DSP ... must add via ICEpick (addr 2).
20 jtag newtap $_CHIPNAME dsp -irlen 38 -disable
21
22 # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
23 if { [info exists ETB_TAPID] } {
24 set _ETB_TAPID $ETB_TAPID
25 } else {
26 set _ETB_TAPID 0x2b900f0f
27 }
28 jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETB_TAPID
29
30 # Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
31 if { [info exists CPU_TAPID] } {
32 set _CPU_TAPID $CPU_TAPID
33 } else {
34 set _CPU_TAPID 0x07b3602f
35 }
36 jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID
37
38 # Primary TAP: ICEpick-B (JTAG route controller) and boundary scan
39 if { [info exists JRC_TAPID] } {
40 set _JRC_TAPID $JRC_TAPID
41 } else {
42 set _JRC_TAPID 0x01ce4801
43 }
44 jtag newtap $_CHIPNAME jrc -irlen 2 -expected-id $_JRC_TAPID
45
46 # GDB target: the ARM.
47 set _TARGETNAME $_CHIPNAME.arm
48 target create $_TARGETNAME arm11 -chain-position $_TARGETNAME
49
50 # scratch: framebuffer, may be initially unavailable in some chips
51 $_TARGETNAME configure -work-area-phys 0x40210000
52 $_TARGETNAME configure -work-area-size 0x00081000
53 $_TARGETNAME configure -work-area-backup 0
54
55 # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
56 etm config $_TARGETNAME 16 normal full etb
57 etb config $_TARGETNAME $_CHIPNAME.etb
58
59 # RM_RSTCTRL_WKUP.RST.GS - Trigger a global software reset, and
60 # give it a chance to finish before we talk to the chip again.
61 set RM_RSTCTRL_WKUP 0x48008450
62 $_TARGETNAME configure -event reset-assert \
63 "halt; $_TARGETNAME mww $RM_RSTCTRL_WKUP 2; sleep 200"

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