tcl/target/omap3530.cfg

   1 #File omap3530.cfg - as found on the BEAGLEBOARD
   2 #  Assumption is it is generic for all OMAP3530
   3
   4 #TI OMAP3 processor - http://www.ti.com
   5
   6 if { [info exists CHIPNAME] } {
   7    set  _CHIPNAME $CHIPNAME
   8 } else {
   9    set  _CHIPNAME omap3
  10 }
  11
  12 if { [info exists ENDIAN] } {
  13    set  _ENDIAN $ENDIAN
  14 } else {
  15   # this defaults to a little endianness
  16   set  _ENDIAN little
  17 }
  18
  19 if { [info exists CPUTAPID ] } {
  20    set _CPUTAPID $CPUTAPID
  21 } else {
  22   # force an error till we get a good number
  23   set _CPUTAPID 0x0B6D602F
  24 }
  25
  26 #jtag scan chain
  27 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0 -expected-id $_CPUTAPID -disable
  28 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id 0x0b7ae02f
  29
  30 target create omap3.cpu cortex_m3 -endian little -chain-position omap3.cpu
  31
  32 jtag configure $_CHIPNAME.cpu -event tap-enable {
  33         puts "Enabling Cortex-A8 @ OMAP3"
  34         irscan omap3.jrc 7 -endstate IRPAUSE
  35         drscan omap3.jrc 8 0x89 -endstate DRPAUSE
  36         irscan omap3.jrc 2 -endstate IRPAUSE
  37         drscan omap3.jrc 32 0xa3002108  -endstate RUN/IDLE
  38         irscan omap3.jrc 0x3F -endstate RUN/IDLE
  39         runtest 10
  40         puts "Cortex-A8 @ OMAP3 enabled"
  41 }
  42
  43 proc omap3_dbginit { } {
  44      version
  45      jtag tapenable omap3.cpu
  46      targets
  47      # sleep 1000
  48      # dap apsel 1
  49      # sleep 1000
  50      # dap apsel 1
  51      # dap info 1
  52      omap3.cpu mww 0x54011FB0 0xC5ACCE55 4
  53      omap3.cpu mdw 0x54011314
  54      omap3.cpu mdw 0x54011314
  55      # omap3.cpu mdw 0x54011080
  56      omap3.cpu mww 0x5401d030 0x00002000 4
  57 }