target: icepick: call icepick_c_setup
[openocd.git] / tcl / target / or1k.cfg
1 set _ENDIAN big
2
3 if { [info exists CHIPNAME] } {
4 set _CHIPNAME $CHIPNAME
5 } else {
6 set _CHIPNAME or1k
7 }
8
9 if { [info exists TAP_TYPE] } {
10 set _TAP_TYPE $TAP_TYPE
11 } else {
12 puts "You need to select a tap type"
13 shutdown
14 }
15
16 # Configure the target
17 if { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
18 if { [info exists FPGATAPID] } {
19 set _FPGATAPID $FPGATAPID
20 } else {
21 puts "You need to set your FPGA JTAG ID"
22 shutdown
23 }
24
25 jtag newtap $_CHIPNAME cpu -irlen 10 -expected-id $_FPGATAPID
26
27 set _TARGETNAME $_CHIPNAME.cpu
28 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
29
30 # Select the TAP core we are using
31 tap_select vjtag
32
33 } elseif { [string compare $_TAP_TYPE "XILINX_BSCAN"] == 0 } {
34
35 if { [info exists FPGATAPID] } {
36 set _FPGATAPID $FPGATAPID
37 } else {
38 puts "You need to set your FPGA JTAG ID"
39 shutdown
40 }
41
42 jtag newtap $_CHIPNAME cpu -irlen 6 -expected-id $_FPGATAPID
43
44 set _TARGETNAME $_CHIPNAME.cpu
45 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
46
47 # Select the TAP core we are using
48 tap_select xilinx_bscan
49 } else {
50 # OpenCores Mohor JTAG TAP ID
51 set _CPUTAPID 0x14951185
52
53 jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
54
55 set _TARGETNAME $_CHIPNAME.cpu
56 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
57
58 # Select the TAP core we are using
59 tap_select mohor
60 }
61
62 # Select the debug unit core we are using. This debug unit as an option.
63
64 set ADBG_USE_HISPEED 1
65 set ENABLE_JSP_SERVER 2
66 set ENABLE_JSP_MULTI 4
67
68 # If ADBG_USE_HISPEED is set (options bit 1), status bits will be skipped
69 # on burst reads and writes to improve download speeds.
70 # This option must match the RTL configured option.
71
72 du_select adv [expr $ADBG_USE_HISPEED | $ENABLE_JSP_SERVER | $ENABLE_JSP_MULTI]

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