tcl/target/renesas_rcar_gen3.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 # Renesas R-Car Generation 3 SOCs
   4 # - There are a combination of Cortex-A57s, Cortex-A53s, and Cortex-R7 for each Gen3 SOC
   5 # - Each SOC can boot through any of the, up to 3, core types that it has
   6 #   e.g. H3 can boot through Cortex-A57, Cortex-A53, or Cortex-R7
   7
   8 # Supported Gen3 SOCs and their cores:
   9 #  H3: Cortex-A57 x 4, Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
  10 # M3W: Cortex-A57 x 2, Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
  11 # M3N: Cortex-A57 x 2,                 Cortex-R7 x 2 (Lock-Step)
  12 # V3U:                 Cortex-A76 x 8, Cortex-R52 x2 (Lock-Step)
  13 # V3H:                 Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
  14 # V3M:                 Cortex-A53 x 2, Cortex-R7 x 2 (Lock-Step)
  15 #  E3:                 Cortex-A53 x 1, Cortex-R7 x 2 (Lock-Step)
  16 #  D3:                 Cortex-A53 x 1
  17
  18 # Usage:
  19 # There are 2 configuration options:
  20 # SOC:       Selects the supported SOC. (Default 'H3')
  21 # BOOT_CORE: Selects the booting core. 'CA57', 'CA53', or 'CR7'
  22 #            Defaults to 'CA57' if the SOC has one, else defaults to 'CA53'
  23
  24 if { [info exists SOC] } {
  25         set _soc $SOC
  26 } else {
  27         set _soc H3
  28 }
  29
  30 set _num_ca53 0
  31 set _num_ca57 0
  32 set _num_ca76 0
  33 set _num_cr52 0
  34 set _num_cr7 0
  35
  36 # Set configuration for each SOC and the default 'BOOT_CORE'
  37 switch $_soc {
  38         H3 {
  39                 set _CHIPNAME r8a77950
  40                 set _num_ca57 4
  41                 set _num_ca53 4
  42                 set _num_cr7 1
  43                 set _boot_core CA57
  44         }
  45         M3W {
  46                 set _CHIPNAME r8a77960
  47                 set _num_ca57 2
  48                 set _num_ca53 4
  49                 set _num_cr7 1
  50                 set _boot_core CA57
  51         }
  52         M3N {
  53                 set _CHIPNAME r8a77965
  54                 set _num_ca57 2
  55                 set _num_ca53 4
  56                 set _num_cr7 1
  57                 set _boot_core CA57
  58         }
  59         V3M {
  60                 set _CHIPNAME r8a77970
  61                 set _num_ca57 0
  62                 set _num_ca53 2
  63                 set _num_cr7 1
  64                 set _boot_core CA53
  65         }
  66         V3H {
  67                 set _CHIPNAME r8a77980
  68                 set _num_ca57 0
  69                 set _num_ca53 4
  70                 set _num_cr7 1
  71                 set _boot_core CA53
  72         }
  73         E3 {
  74                 set _CHIPNAME r8a77990
  75                 set _num_ca57 0
  76                 set _num_ca53 1
  77                 set _num_cr7 1
  78                 set _boot_core CA53
  79         }
  80         D3 {
  81                 set _CHIPNAME r8a77995
  82                 set _num_ca57 0
  83                 set _num_ca53 1
  84                 set _num_cr7 0
  85                 set _boot_core CA53
  86         }
  87         V3U {
  88                 set _CHIPNAME r8a779a0
  89                 set _num_ca76 8
  90                 set _num_cr52 1
  91                 set _boot_core CA76
  92         }
  93         default {
  94                 error "'$_soc' is invalid!"
  95         }
  96 }
  97
  98 # If configured, override the default 'CHIPNAME'
  99 if { [info exists CHIPNAME] } {
 100         set _CHIPNAME $CHIPNAME
 101 }
 102
 103 # If configured, override the default 'BOOT_CORE'
 104 if { [info exists BOOT_CORE] } {
 105         set _boot_core $BOOT_CORE
 106 }
 107
 108 if { [info exists DAP_TAPID] } {
 109         set _DAP_TAPID $DAP_TAPID
 110 } else {
 111         set _DAP_TAPID 0x5ba00477
 112 }
 113
 114 echo "\t$_soc - $_num_ca76 CA76(s), $_num_ca57 CA57(s), $_num_ca53 CA53(s), $_num_cr52 CR52(s), $_num_cr7 CR7(s)"
 115 echo "\tBoot Core - $_boot_core\n"
 116
 117 set _DAPNAME $_CHIPNAME.dap
 118
 119 # TAP and DAP
 120 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID
 121 dap create $_DAPNAME -chain-position $_CHIPNAME.cpu
 122
 123 set CA76_DBGBASE {0x81410000 0x81510000 0x81610000 0x81710000 0x81c10000 0x81d10000 0x81e10000 0x81f10000}
 124 set CA76_CTIBASE {0x81420000 0x81520000 0x81620000 0x81720000 0x81c20000 0x81d20000 0x81e20000 0x81f20000}
 125 set CA57_DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000}
 126 set CA57_CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
 127 set CA53_DBGBASE {0x80C10000 0x80D10000 0x80E10000 0x80F10000}
 128 set CA53_CTIBASE {0x80C20000 0x80D20000 0x80E20000 0x80F20000}
 129 set CR52_DBGBASE 0x80c10000
 130 set CR52_CTIBASE 0x80c20000
 131 set  CR7_DBGBASE 0x80910000
 132 set  CR7_CTIBASE 0x80918000
 133
 134 set _targets ""
 135 set smp_targets ""
 136
 137 proc setup_a5x {core_name dbgbase ctibase num boot} {
 138         global _CHIPNAME
 139         global _DAPNAME
 140         global smp_targets
 141         global _targets
 142         for { set _core 0 } { $_core < $num } { incr _core } {
 143                 set _TARGETNAME $_CHIPNAME.$core_name.$_core
 144                 set _CTINAME $_TARGETNAME.cti
 145                 cti create $_CTINAME -dap $_DAPNAME -ap-num 1 \
 146                         -baseaddr [lindex $ctibase $_core]
 147                 set _command "target create $_TARGETNAME aarch64 -dap $_DAPNAME \
 148                         -ap-num 1 -dbgbase [lindex $dbgbase $_core] -cti $_CTINAME"
 149                 if { $_core == 0  && $boot == 1 } {
 150                         set _targets "$_TARGETNAME"
 151                 } else {
 152                         set _command "$_command -defer-examine"
 153                 }
 154                 set smp_targets "$smp_targets $_TARGETNAME"
 155                 eval $_command
 156         }
 157 }
 158
 159 proc setup_cr7 {core_name dbgbase ctibase num boot} {
 160         global _CHIPNAME
 161         global _DAPNAME
 162         for { set _core 0 } { $_core < $num } { incr _core } {
 163                 set _TARGETNAME $_CHIPNAME.$core_name
 164                 set _CTINAME $_TARGETNAME.cti
 165                 cti create $_CTINAME -dap $_DAPNAME -ap-num 1 -baseaddr $ctibase
 166                 set _command "target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \
 167                         -ap-num 1 -dbgbase $dbgbase"
 168                 if { $boot == 1 } {
 169                         set _targets "$_TARGETNAME"
 170                 } else {
 171                         set _command "$_command -defer-examine"
 172                 }
 173                 eval $_command
 174         }
 175 }
 176
 177 # Organize target list based on the boot core
 178 if { [string equal $_boot_core CA76] } {
 179         setup_a5x a76 $CA76_DBGBASE $CA76_CTIBASE $_num_ca76 1
 180         setup_cr7 r52 $CR52_DBGBASE $CR52_CTIBASE $_num_cr52 0
 181 } elseif { [string equal $_boot_core CA57] } {
 182         setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 1
 183         setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
 184         setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  0
 185 } elseif { [string equal $_boot_core CA53] } {
 186         setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 1
 187         setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0
 188         setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  0
 189 } elseif { [string equal $_boot_core CR52] } {
 190         setup_cr7 r52 $CR52_DBGBASE $CR52_CTIBASE $_num_cr52 1
 191         setup_a5x a76 $CA76_DBGBASE $CA76_CTIBASE $_num_ca76 0
 192 } else {
 193         setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  1
 194         setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0
 195         setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
 196 }
 197
 198 source [find target/renesas_rcar_reset_common.cfg]
 199
 200 eval "target smp $smp_targets"
 201 targets $_targets