target: add Espressif ESP32-S2 basic support
[openocd.git] / tcl / target / renesas_rz_five.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # Renesas RZ/Five SoC
4 #
5 # General-purpose Microprocessors with RISC-V CPU Core (Andes AX45MP Single) (1.0 GHz)
6
7 transport select jtag
8
9 reset_config trst_and_srst srst_gates_jtag
10 adapter speed 4000
11 adapter srst delay 500
12
13 if { [info exists CHIPNAME] } {
14 set _CHIPNAME $CHIPNAME
15 } else {
16 set _CHIPNAME r9A07g043u
17 }
18
19 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
20
21 set _TARGETNAME $_CHIPNAME.cpu
22 target create $_TARGETNAME riscv -chain-position $_TARGETNAME

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