jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / tcl / target / sim3x.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 #
4 # Silicon Laboratories SiM3x Cortex-M3
5 #
6
7 # SiM3x devices support both JTAG and SWD transports.
8 source [find target/swj-dp.tcl]
9
10 if { [info exists CHIPNAME] } {
11 set _CHIPNAME $CHIPNAME
12 } else {
13 set _CHIPNAME SiM3x
14 }
15
16 if { [info exists CPUTAPID] } {
17 set _CPUTAPID $CPUTAPID
18 } else {
19 set _CPUTAPID 0x4ba00477
20 }
21
22 if { [info exists CPURAMSIZE] } {
23 set _CPURAMSIZE $CPURAMSIZE
24 } else {
25 # Minimum size of RAM in the Silicon Labs product matrix (8KB)
26 set _CPURAMSIZE 0x2000
27 }
28
29 if { [info exists CPUROMSIZE] } {
30 set _CPUROMSIZE $CPUROMSIZE
31 } else {
32 # Minimum size of FLASH in the Silicon Labs product matrix (32KB)
33 set _CPUROMSIZE 0x8000
34 }
35
36 if { [info exists WORKAREASIZE] } {
37 set _WORKAREASIZE $WORKAREASIZE
38 } else {
39 set _WORKAREASIZE $_CPURAMSIZE
40 }
41
42 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
43 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
44
45 set _TARGETNAME $_CHIPNAME.cpu
46 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
47
48 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
49
50 set _FLASHNAME $_CHIPNAME.flash
51 flash bank $_FLASHNAME sim3x 0 $_CPUROMSIZE 0 0 $_TARGETNAME
52
53 adapter speed 1000
54
55 adapter srst delay 100
56 if {[using_jtag]} {
57 jtag_ntrst_delay 100
58 }

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