1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # script for stm32f2x family
6 # stm32 devices support both JTAG and SWD transports.
8 source [find target/swj-dp.tcl]
9 source [find mem_helper.tcl]
11 if { [info exists CHIPNAME] } {
12 set _CHIPNAME $CHIPNAME
14 set _CHIPNAME stm32f2x
19 # Work-area is a space in RAM used for flash programming
21 if { [info exists WORKAREASIZE] } {
22 set _WORKAREASIZE $WORKAREASIZE
24 set _WORKAREASIZE 0x10000
27 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
29 # Since we may be running of an RC oscilator, we crank down the speed a
30 # bit more to be on the safe side. Perhaps superstition, but if are
31 # running off a crystal, we can run closer to the limit. Note
32 # that there can be a pretty wide band where things are more or less stable.
35 adapter srst delay 100
41 if { [info exists CPUTAPID] } {
42 set _CPUTAPID $CPUTAPID
45 # See STM Document RM0033
46 # Section 32.6.3 - corresponds to Cortex-M3 r2p0
47 set _CPUTAPID 0x4ba00477
49 set _CPUTAPID 0x2ba01477
53 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
54 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
57 jtag newtap $_CHIPNAME bs -irlen 5
60 set _TARGETNAME $_CHIPNAME.cpu
61 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
63 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
65 set _FLASHNAME $_CHIPNAME.flash
66 flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
67 flash bank $_CHIPNAME.otp stm32f2x 0x1fff7800 0 0 0 $_TARGETNAME
69 reset_config srst_nogate
72 # if srst is not fitted use SYSRESETREQ to
73 # perform a soft reset
74 cortex_m reset_config sysresetreq
77 $_TARGETNAME configure -event examine-end {
78 # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
79 mmw 0xE0042004 0x00000007 0
81 # Stop watchdog counters during halt
82 # DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
83 mmw 0xE0042008 0x00001800 0
86 tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
88 lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
89 proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
92 # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
93 # change this value accordingly to configure trace pins
95 mmw 0xE0042004 0x00000020 0
98 $_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
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