tcl/target/stm32f4x.cfg

   1 # script for stm32f4x family
   2
   3 #
   4 # stm32 devices support both JTAG and SWD transports.
   5 #
   6 source [find target/swj-dp.tcl]
   7
   8 if { [info exists CHIPNAME] } {
   9    set _CHIPNAME $CHIPNAME
  10 } else {
  11    set _CHIPNAME stm32f4x
  12 }
  13
  14 if { [info exists ENDIAN] } {
  15    set _ENDIAN $ENDIAN
  16 } else {
  17    set _ENDIAN little
  18 }
  19
  20 # Work-area is a space in RAM used for flash programming
  21 # By default use 64kB
  22 if { [info exists WORKAREASIZE] } {
  23    set _WORKAREASIZE $WORKAREASIZE
  24 } else {
  25    set _WORKAREASIZE 0x10000
  26 }
  27
  28 #jtag scan chain
  29 if { [info exists CPUTAPID] } {
  30    set _CPUTAPID $CPUTAPID
  31 } else {
  32    if { [using_jtag] } {
  33       # See STM Document RM0090
  34       # Section 38.6.3 - corresponds to Cortex-M4 r0p1
  35       set _CPUTAPID 0x4ba00477
  36    } {
  37       set _CPUTAPID 0x2ba01477
  38    }
  39 }
  40
  41 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  42
  43 if { [info exists BSTAPID] } {
  44    set _BSTAPID $BSTAPID
  45 } else {
  46   # See STM Document RM0090
  47   # Section 38.6.2
  48   # STM32F405xx/07xx and STM32F415xx/17xx
  49   set _BSTAPID1 0x06413041
  50   # STM32F42xxx and STM32F43xxx
  51   set _BSTAPID2 0x06419041
  52   # See STM Document RM0368 (Rev. 3)
  53   # STM32F401B/C
  54   set _BSTAPID3 0x06423041
  55   # STM32F401D/E
  56   set _BSTAPID4 0x06433041
  57   # See STM Document RM0383 (Rev 2)
  58   # STM32F411
  59   set _BSTAPID5 0x06431041
  60 }
  61
  62 if {[using_jtag]} {
  63  swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
  64      -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
  65      -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
  66 }
  67
  68 set _TARGETNAME $_CHIPNAME.cpu
  69 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  70
  71 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  72
  73 set _FLASHNAME $_CHIPNAME.flash
  74 flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
  75
  76 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz
  77 #
  78 # Since we may be running of an RC oscilator, we crank down the speed a
  79 # bit more to be on the safe side. Perhaps superstition, but if are
  80 # running off a crystal, we can run closer to the limit. Note
  81 # that there can be a pretty wide band where things are more or less stable.
  82 adapter_khz 2000
  83
  84 adapter_nsrst_delay 100
  85 if {[using_jtag]} {
  86  jtag_ntrst_delay 100
  87 }
  88
  89 if {![using_hla]} {
  90    # if srst is not fitted use SYSRESETREQ to
  91    # perform a soft reset
  92    cortex_m reset_config sysresetreq
  93 }