tcl/target/stm32l.cfg

   1 # script for stm32l
   2
   3 #
   4 # stm32 devices support both JTAG and SWD transports.
   5 #
   6 source [find target/swj-dp.tcl]
   7
   8 if { [info exists CHIPNAME] } {
   9    set _CHIPNAME $CHIPNAME
  10 } else {
  11    set _CHIPNAME stm32l
  12 }
  13
  14 if { [info exists ENDIAN] } {
  15    set _ENDIAN $ENDIAN
  16 } else {
  17    set _ENDIAN little
  18 }
  19
  20 # Work-area is a space in RAM used for flash programming
  21 # By default use 10kB
  22 if { [info exists WORKAREASIZE] } {
  23    set _WORKAREASIZE $WORKAREASIZE
  24 } else {
  25    set _WORKAREASIZE 0x2800
  26 }
  27
  28 # JTAG speed should be <= F_CPU/6.
  29 # F_CPU after reset is 2MHz, so use F_JTAG max = 333kHz
  30 adapter_khz 300
  31
  32 adapter_nsrst_delay 100
  33 if {[using_jtag]} {
  34  jtag_ntrst_delay 100
  35 }
  36
  37 #jtag scan chain
  38 if { [info exists CPUTAPID] } {
  39    set _CPUTAPID $CPUTAPID
  40 } else {
  41    if { [using_jtag] } {
  42       # See STM Document RM0038
  43       # Section 24.6.3
  44       set _CPUTAPID 0x4ba00477
  45    } {
  46       set _CPUTAPID1 0x2ba01477
  47       set _CPUTAPID2 0x0bc11477
  48    }
  49 }
  50
  51 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID1 -expected-id $_CPUTAPID2
  52
  53 if { [info exists BSTAPID] } {
  54    # FIXME this never gets used to override defaults...
  55    set _BSTAPID $BSTAPID
  56 } else {
  57   # See STM Document RM0038
  58   # Section 24.6.2
  59   set _BSTAPID 0x06416041
  60 }
  61
  62 if {[using_jtag]} {
  63  swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
  64 }
  65
  66 set _TARGETNAME $_CHIPNAME.cpu
  67 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  68
  69 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  70
  71 # flash size will be probed
  72 set _FLASHNAME $_CHIPNAME.flash
  73 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
  74
  75 if {![using_hla]} {
  76    # if srst is not fitted use SYSRESETREQ to
  77    # perform a soft reset
  78    cortex_m reset_config sysresetreq
  79 }
  80
  81 proc stm32l_enable_HSI {} {
  82         # Enable HSI as clock source
  83         echo "STM32L: Enabling HSI"
  84
  85         # Set HSION in RCC_CR
  86         mww 0x40023800 0x00000101
  87
  88         # Set HSI as SYSCLK
  89         mww 0x40023808 0x00000001
  90
  91         # Increase JTAG speed
  92         adapter_khz 2000
  93 }
  94
  95 $_TARGETNAME configure -event reset-init {
  96         stm32l_enable_HSI
  97 }
  98
  99 $_TARGETNAME configure -event reset-start {
 100         adapter_khz 300
 101 }