tcl/target/stm32l.cfg

   1 # script for stm32l
   2
   3 #
   4 # stm32 devices support both JTAG and SWD transports.
   5 #
   6 source [find target/swj-dp.tcl]
   7
   8 if { [info exists CHIPNAME] } {
   9    set _CHIPNAME $CHIPNAME
  10 } else {
  11    set _CHIPNAME stm32l
  12 }
  13
  14 if { [info exists ENDIAN] } {
  15    set _ENDIAN $ENDIAN
  16 } else {
  17    set _ENDIAN little
  18 }
  19
  20 # Work-area is a space in RAM used for flash programming
  21 # By default use 10kB
  22 if { [info exists WORKAREASIZE] } {
  23    set _WORKAREASIZE $WORKAREASIZE
  24 } else {
  25    set _WORKAREASIZE 0x2800
  26 }
  27
  28 # JTAG speed should be <= F_CPU/6.
  29 # F_CPU after reset is 2MHz, so use F_JTAG max = 333kHz
  30 adapter_khz 100
  31
  32 adapter_nsrst_delay 100
  33 if {$using_jtag} {
  34  jtag_ntrst_delay 100
  35 }
  36
  37 #jtag scan chain
  38 if { [info exists CPUTAPID] } {
  39    set _CPUTAPID $CPUTAPID
  40 } else {
  41   # See STM Document RM0038
  42   # Section 24.6.3
  43    set _CPUTAPID 0x4ba00477
  44 }
  45
  46 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  47
  48 if { [info exists BSTAPID] } {
  49    # FIXME this never gets used to override defaults...
  50    set _BSTAPID $BSTAPID
  51 } else {
  52   # See STM Document RM0038
  53   # Section 24.6.2
  54   set _BSTAPID 0x06416041
  55 }
  56
  57 if {$using_jtag} {
  58  jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
  59 }
  60
  61 set _TARGETNAME $_CHIPNAME.cpu
  62 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  63
  64 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  65
  66 # flash size will be probed
  67 set _FLASHNAME $_CHIPNAME.flash
  68 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
  69
  70 # if srst is not fitted use SYSRESETREQ to
  71 # perform a soft reset
  72 cortex_m reset_config sysresetreq
  73
  74 proc stm32l_enable_HSI {} {
  75         # Enable HSI as clock source
  76         echo "STM32L: Enabling HSI"
  77
  78         # Set HSION in RCC_CR
  79         mww 0x40023800 0x00000101
  80
  81         # Set HSI as SYSCLK
  82         mww 0x40023808 0x00000001
  83
  84         # Increase JTAG speed
  85         adapter_khz 2000
  86 }
  87
  88 $_TARGETNAME configure -event reset-init {
  89         stm32l_enable_HSI
  90 }
  91