cfg: add srst_nogate to the supported targets, remove from board configs
[openocd.git] / tcl / target / stm32w108xx.cfg
1 #
2 # Target configuration for the ST STM32W108xx chips
3 #
4 # Processor: ARM Cortex M3
5 # Date: 2013-06-09
6 # Author: Giuseppe Barba <giuseppe.barba@gmail.com>
7
8 #
9 # stm32 devices support both JTAG and SWD transports.
10 #
11 source [find target/swj-dp.tcl]
12
13 if { [info exists CHIPNAME] == 0 } {
14 set _CHIPNAME stm32w108
15 } else {
16 set _CHIPNAME $CHIPNAME
17 }
18
19 # Work-area is a space in RAM used for flash programming
20 # By default use 8kB
21 if { [info exists WORKAREASIZE] } {
22 set _WORKAREASIZE $WORKAREASIZE
23 } else {
24 set _WORKAREASIZE 0x2000
25 }
26
27 if { [info exists CPUTAPID] } {
28 set _CPUTAPID $CPUTAPID
29 } else {
30 if { [using_jtag] } {
31 set _CPUTAPID 0x3ba00477
32 } {
33 set _CPUTAPID 0x1ba01477
34 }
35 }
36
37 set _ENDIAN little
38
39 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
40
41 if {[using_jtag]} {
42 if { [info exists BSTAPID] } {
43 set _BSTAPID $BSTAPID
44 swj_newdap $_CHIPNAME bs -irlen 4 -ircapture 0xe -irmask 0xf -expected-id _BSTAPID
45 } else {
46 set _BSTAPID_1 0x169a862b
47 set _BSTAPID_2 0x269a862b
48 swj_newdap $_CHIPNAME bs -irlen 4 -ircapture 0xe -irmask 0xf \
49 -expected-id $_BSTAPID_1 -expected-id $_BSTAPID_2
50 }
51 }
52 #
53 # Set Target
54 #
55 set _TARGETNAME $_CHIPNAME.cpu
56 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
57 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
58
59
60 # Use the flash driver from the EM357
61 set _FLASHNAME $_CHIPNAME.flash
62
63 # 64k (0x10000) of flash
64 flash bank $_FLASHNAME em357 0x08000000 0x10000 0 0 $_TARGETNAME
65
66 reset_config srst_nogate
67
68 if {![using_hla]} {
69 cortex_m reset_config sysresetreq
70 }

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