tcl/target/swm050.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 # Synwit SWM050
   4
   5 source [find target/swj-dp.tcl]
   6
   7 if { [info exists CHIPNAME] } {
   8         set _CHIPNAME $CHIPNAME
   9 } else {
  10         set _CHIPNAME swm050
  11 }
  12 set _CHIPSERIES swm050
  13
  14 if { [info exists WORKAREASIZE] } {
  15         set _WORKAREASIZE $WORKAREASIZE
  16 } else {
  17         set _WORKAREASIZE 0x400
  18 }
  19
  20 if { [info exists CPUTAPID] } {
  21         set _CPUTAPID $CPUTAPID
  22 } else {
  23         set _CPUTAPID 0x0bb11477
  24 }
  25
  26 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
  27 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  28 set _TARGETNAME $_CHIPNAME.cpu
  29 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
  30 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
  31 set _FLASHNAME $_CHIPNAME.flash
  32 flash bank $_FLASHNAME swm050 0x0 0x2000 0 0 $_TARGETNAME
  33
  34 adapter speed 1000
  35
  36 $_TARGETNAME configure -event reset-init {
  37         # Stop the watchdog, just to be safe
  38         mww 0x40019000 0x00
  39         # Set clock divider value to 1
  40         mww 0x400F0000 0x01
  41         # Set system clock to 18Mhz
  42         mww 0x400F0008 0x00
  43 }
  44
  45 # SWM050 (Cortex-M0 core) supports SYSRESETREQ
  46 if {![using_hla]} {
  47     # if srst is not fitted use SYSRESETREQ to
  48     # perform a soft reset
  49     cortex_m reset_config sysresetreq
  50 }