tcl/target/ti_calypso.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #
   4 # TI Calypso (lite) G2 C035 Digital Base Band chip
   5 #
   6 # ARM7TDMIE + DSP subchip (S28C128)
   7 #
   8 # 512K SRAM Calypso
   9 # 256K SRAM Calypso lite
  10 #
  11 if { [info exists CHIPNAME] } {
  12         set  _CHIPNAME $CHIPNAME
  13 } else {
  14         set  _CHIPNAME calypso
  15 }
  16
  17 if { [info exists ENDIAN] } {
  18         set  _ENDIAN $ENDIAN
  19 } else {
  20         set  _ENDIAN little
  21 }
  22
  23 if { [info exists CPUTAPID] } {
  24         set _CPUTAPID $CPUTAPID
  25 } else {
  26         set _CPUTAPID 0x3100e02f
  27 }
  28
  29 # Work-area is a space in RAM used for flash programming
  30 # By default use 64kB
  31 if { [info exists WORKAREASIZE] } {
  32         set _WORKAREASIZE $WORKAREASIZE
  33 } else {
  34         set _WORKAREASIZE 0x10000
  35 }
  36
  37 adapter speed 1000
  38
  39 reset_config trst_and_srst
  40
  41 jtag newtap $_CHIPNAME dsp -expected-id 0x00000000 -irlen 8
  42 jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  43
  44 # target
  45
  46 set _TARGETNAME $_CHIPNAME.arm
  47 target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME
  48
  49 # workarea
  50
  51 $_TARGETNAME configure -work-area-phys 0x00800000 -work-area-size $_WORKAREASIZE -work-area-backup 1
  52
  53 arm7_9 dcc_downloads enable
  54 arm7_9 fast_memory_access enable
  55
  56 $_TARGETNAME configure -event examine-start {
  57         irscan calypso.arm 0x0b -endstate DRPAUSE
  58         drscan calypso.arm 2 2 -endstate RUN/IDLE
  59 }