flash Kinetis: add KE1xZ and KE1xF families
[openocd.git] / tcl / target / ti_calypso.cfg
1 #
2 # TI Calypso (lite) G2 C035 Digital Base Band chip
3 #
4 # ARM7TDMIE + DSP subchip (S28C128)
5 #
6 # 512K SRAM Calypso
7 # 256K SRAM Calypso lite
8 #
9 if { [info exists CHIPNAME] } {
10 set _CHIPNAME $CHIPNAME
11 } else {
12 set _CHIPNAME calypso
13 }
14
15 if { [info exists ENDIAN] } {
16 set _ENDIAN $ENDIAN
17 } else {
18 set _ENDIAN little
19 }
20
21 if { [info exists CPUTAPID] } {
22 set _CPUTAPID $CPUTAPID
23 } else {
24 set _CPUTAPID 0x3100e02f
25 }
26
27 # Work-area is a space in RAM used for flash programming
28 # By default use 64kB
29 if { [info exists WORKAREASIZE] } {
30 set _WORKAREASIZE $WORKAREASIZE
31 } else {
32 set _WORKAREASIZE 0x10000
33 }
34
35 adapter_khz 1000
36
37 reset_config trst_and_srst
38
39 jtag newtap $_CHIPNAME dsp -expected-id 0x00000000 -irlen 8
40 jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
41
42 # target
43
44 set _TARGETNAME $_CHIPNAME.arm
45 target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME
46
47 # workarea
48
49 $_TARGETNAME configure -work-area-phys 0x00800000 -work-area-size $_WORKAREASIZE -work-area-backup 1
50
51 arm7_9 dcc_downloads enable
52 arm7_9 fast_memory_access enable
53
54 $_TARGETNAME configure -event examine-start {
55 irscan calypso.arm 0x0b -endstate DRPAUSE
56 drscan calypso.arm 2 2 -endstate RUN/IDLE
57 }

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