tcl/target/vd_riscv.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2 # Cadence virtual debug interface
   3 # RISCV core
   4
   5 if {![info exists _HARTID]} {
   6         set _HARTID 0x00
   7 }
   8 if {![info exists _CHIPNAME]} {
   9         set _CHIPNAME riscv
  10 }
  11 set _TARGETNAME $_CHIPNAME.cpu
  12
  13 target create $_TARGETNAME riscv -chain-position $_TARGETNAME -coreid $_HARTID
  14
  15 riscv set_reset_timeout_sec 120
  16 riscv set_command_timeout_sec 120
  17 # prefer to use sba for system bus access
  18 riscv set_prefer_sba on