b11de328791b4ea681e553e02cf41ac3573ff7e0
[openocd.git] / tcl / target / zynq_7000.cfg
1 #
2 # Xilinx Zynq-7000 All Programmable SoC
3 #
4 # http://www.xilinx.com/products/silicon-devices/soc/zynq-7000/index.htm
5 #
6
7 set _CHIPNAME zynq
8 set _TARGETNAME $_CHIPNAME.cpu
9
10 jtag newtap zynq_pl bs -irlen 6 -ircapture 0x1 -irmask 0x03 \
11 -expected-id 0x23727093 \
12 -expected-id 0x13722093 \
13 -expected-id 0x03727093
14
15 jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4ba00477
16
17 target create ${_TARGETNAME}0 cortex_a -chain-position $_CHIPNAME.dap \
18 -coreid 0 -dbgbase 0x80090000
19 target create ${_TARGETNAME}1 cortex_a -chain-position $_CHIPNAME.dap \
20 -coreid 1 -dbgbase 0x80092000
21 target smp ${_TARGETNAME}0 ${_TARGETNAME}1
22
23 adapter_khz 1000
24
25 ${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
26 ${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"

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