     [file version.texi not included]

OpenOCD
*******

This manual documents edition EDITION of the Open On-Chip Debugger (OpenOCD) version VERSION, UPDATED.

  * Copyright © 2008 The OpenOCD Project

  * Copyright © 2007-2008 Spencer Oliver spen@spen-soft.co.uk

  * Copyright © 2008 Oyvind Harboe oyvind.harboe@zylin.com

  * Copyright © 2008 Duane Ellis openocd@duaneellis.com

     Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, with no Front-Cover Texts, and with no Back-Cover Texts.  A copy of the license is included in the section entitled ``GNU Free Documentation License''.

About
*****

The Open On-Chip Debugger (OpenOCD) aims to provide debugging, in-system programming and boundary-scan testing for embedded target devices.

JTAG: OpenOCD uses a ``hardware interface dongle'' to communicate with the JTAG (IEEE 1149.1) complient taps on your target board.

Dongles: OpenOCD currently many types of hardware dongles: USB Based, Parallel Port Based, and other standalone boxes that run OpenOCD internally. See the section titled: see JTAG Hardware Dongles.

GDB Debug: It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920t, ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be debugged via the GDB Protocol.

Flash Programing: Flash writing is supported for external CFI compatible flashes (Intel and AMD/Spansion command set) and several internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3 and STM32x). Preliminary support for using the LPC3180's NAND flash controller is included.

Developers
**********

OpenOCD was created by Dominic Rath as part of a diploma thesis written at the University of Applied Sciences Augsburg (http://www.fh-augsburg.de). Others interested in improving the state of free and open debug and testing technology are welcome to participate.

Other developers have contributed support for additional targets and flashes as well as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.

The main OpenOCD web site is available at http://openocd.berlios.de/web/

Building
********

If you are interested in getting actual work done rather than building OpenOCD, then check if your interface supplier provides binaries for you. Chances are that that binary is from some SVN version that is more stable than SVN trunk where bleeding edge development takes place.

You can download the current SVN version with SVN client of your choice from the following repositories:

(svn://svn.berlios.de/openocd/trunk)

or

(http://svn.berlios.de/svnroot/repos/openocd/trunk)

Using the SVN command line client, you can use the following command to fetch the latest version (make sure there is no (non-svn) directory called "openocd" in the current directory):

      svn checkout svn://svn.berlios.de/openocd/trunk openocd

Building OpenOCD requires a recent version of the GNU autotools. On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows, you have to use Cygwin. Make sure that your PATH environment variable contains no other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin paths, resulting in obscure dependency errors (This is an observation I've gathered from the logs of one user - correct me if I'm wrong).

You further need the appropriate driver files, if you want to build support for a FTDI FT2232 based interface:

  * ftdi2232 libftdi (http://www.intra2net.com/opensource/ftdi/)

  * ftd2xx libftd2xx (http://www.ftdichip.com/Drivers/D2XX.htm)

  * When using the Amontec JTAGkey, you have to get the drivers from the Amontec homepage (www.amontec.com), as the JTAGkey uses a non-standard VID/PID.

libftdi is supported under windows. Versions earlier than 0.13 will require patching. see contrib/libftdi for more details.

In general, the D2XX driver provides superior performance (several times as fast), but has the draw-back of being binary-only - though that isn't that bad, as it isn't a kernel module, only a user space library.

To build OpenOCD (on both Linux and Cygwin), use the following commands:

      ./bootstrap

Bootstrap generates the configure script, and prepares building on your system.

      ./configure

Configure generates the Makefiles used to build OpenOCD.

      make

Make builds OpenOCD, and places the final executable in ./src/.

The configure script takes several options, specifying which JTAG interfaces should be included:

  * --enable-parport

  * --enable-parport_ppdev

  * --enable-parport_giveio

  * --enable-amtjtagaccel

  * --enable-ft2232_ftd2xx (Using the latest D2XX drivers from FTDI and following their installation instructions, I had to use --enable-ft2232_libftd2xx for OpenOCD to build properly.)

  * --enable-ft2232_libftdi

  * --with-ftd2xx=/path/to/d2xx/

  * --enable-gw16012

  * --enable-usbprog

  * --enable-presto_libftdi

  * --enable-presto_ftd2xx

  * --enable-jlink

  * --enable-rlink

If you want to access the parallel port using the PPDEV interface you have to specify both the --enable-parport AND the --enable-parport_ppdev option since the --enable-parport_ppdev option actually is an option to the parport driver (see http://forum.sparkfun.com/viewtopic.php?t=3795 for more info).

Cygwin users have to specify the location of the FTDI D2XX package. This should be an absolute path containing no spaces.

Linux users should copy the various parts of the D2XX package to the appropriate locations, i.e. /usr/include, /usr/lib.

Miscellaneous configure options

  * --enable-gccwarnings - enable extra gcc warnings during build

JTAG Hardware Dongles
*********************

Defined: dongle: A small device that plugins into a computer and serves as an adapter .... [snip]

In the OpenOCD case, this generally refers to a small adapater one attaches to your computer via USB or the Parallel Printer Port.  The execption being the Zylin ZY1000 which is a small box you attach via an ethernet cable.

Choosing a Dongle
=================

There are three things you should keep in mind when choosing a dongle.

 1. Voltage What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?

 2. Connection Printer Ports - Does your computer have one?

 3. Connection Is that long printer bit-bang cable practical?

 4. RTCK Do you require RTCK? Also known as ``adaptive clocking''

Stand alone Systems
===================

ZY1000 See: http://www.zylin.com/zy1000.html Technically, not a dongle, but a standalone box.

USB FT2232 Based
================

There are many USB jtag dongles on the market, many of them are based on a chip from ``Future Technology Devices International'' (FTDI) known as the FTDI FT2232.

See: http://www.ftdichip.com or http://www.ftdichip.com/Products/FT2232H.htm

As of 28/Nov/2008, the following are supported:

  * usbjtag

      Link http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html

  * jtagkey

      See: http://www.amontec.com/jtagkey.shtml

  * oocdlink

      See: http://www.oocdlink.com By Joern Kaipf

  * signalyzer

      See: http://www.signalyzer.com

  * evb_lm3s811

      See: http://www.luminarymicro.com - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.

  * olimex-jtag

      See: http://www.olimex.com

  * flyswatter

      See: http://www.tincantools.com

  * turtelizer2

      See: http://www.ethernut.de, or http://www.ethernut.de/en/hardware/turtelizer/index.html

  * comstick

      Link: http://www.hitex.com/index.php?id=383

  * stm32stick

      Link http://www.hitex.com/stm32-stick

  * axm0432_jtag

      Axiom AXM-0432 Link http://www.axman.com

USB JLINK based
===============

There are several OEM versions of the Segger JLINK adapter. It is an example of a micro controller based JTAG adapter, it uses an AT91SAM764 internally.

  * ATMEL SAMICE Only works with ATMEL chips!

      Link: http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892

  * SEGGER JLINK

      Link: http://www.segger.com/jlink.html

  * IAR J-Link

      Link: http://www.iar.com/website1/1.0.1.0/369/1/index.php

USB RLINK based
===============

Raisonance has an adapter called RLink.  It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines.  It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.

  * Raisonance RLink

      Link: http://www.raisonance.com/products/RLink.php

  * STM32 Primer

      Link: http://www.stm32circle.com/resources/stm32primer.php

  * STM32 Primer2

      Link: http://www.stm32circle.com/resources/stm32primer2.php

USB Other
=========

  * USBprog

      Link: http://www.embedded-projects.net/usbprog - which uses an Atmel MEGA32 and a UBN9604

  * USB - Presto

      Link: http://tools.asix.net/prg_presto.htm

IBM PC Parallel Printer Port Based
==================================

The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5 and the MacGraigor Wiggler. There are many clones and variations of these on the market.

  * Wiggler - There are many clones of this.

      Link: http://www.macraigor.com/wiggler.htm

  * DLC5 - From XILINX - There are many clones of this

      Link: Search the web for: ``XILINX DLC5'' - it is no longer produced, PDF schematics are easily found and it is easy to make.

  * Amontec - JTAG Accelerator

      Link: http://www.amontec.com/jtag_accelerator.shtml

  * GW16402

      Link: http://www.gateworks.com/products/avila_accessories/gw16042.php

  * Wiggler2

      Link: http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag

  * Wiggler_ntrst_inverted

      Yet another variation - See the source code, src/jtag/parport.c

  * old_amt_wiggler

      Unknown - probably not on the market today

  * arm-jtag

      Link: Most likely http://www.olimex.com/dev/arm-jtag.html [another wiggler clone]

  * chameleon

      Link: http://www.amontec.com/chameleon.shtml

  * Triton

      Unknown.

  * Lattice

      ispDownload from Lattice Semiconductor http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf

  * flashlink

      From ST Microsystems, link: http://www.st.com/stonline/products/literature/um/7889.pdf Title: FlashLINK JTAG programing cable for PSD and uPSD

Other...
========

  * ep93xx

      An EP93xx based linux machine using the GPIO pins directly.

  * at91rm9200

      Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.

Running
*******

The --help option shows:
bash$ openocd --help

--help       | -h       display this help
--version    | -v       display OpenOCD version
--file       | -f       use configuration file <name>
--search     | -s       dir to search for config files and scripts
--debug      | -d       set debug level <0-3>
--log_output | -l       redirect log output to file <name>
--command    | -c       run <command>
--pipe       | -p       use pipes when talking to gdb

By default OpenOCD reads the file configuration file ``openocd.cfg'' in the current directory.  To specify a different (or multiple) configuration file, you can use the ``-f'' option. For example:

       openocd -f config1.cfg -f config2.cfg -f config3.cfg

Once started, OpenOCD runs as a daemon, waiting for connections from clients (Telnet, GDB, Other).

If you are having problems, you can enable internal debug messages via the ``-d'' option.

Also it is possible to interleave commands w/config scripts using the -c command line switch.

To enable debug output (when reporting problems or working on OpenOCD itself), use the -d command line switch. This sets the debug_level to "3", outputting the most information, including debug messages. The default setting is "2", outputting only informational messages, warnings and errors. You can also change this setting from within a telnet or gdb session using debug_level <n> See debug_level.

You can redirect all output from the daemon to a file using the -l <logfile> switch.

Search paths for config/script files can be added to OpenOCD by using the -s <search> switch. The current directory and the OpenOCD target library is in the search path by default.

For details on the -p option. See Connecting to GDB. Option -p is not currently supported under native win32.

Note! OpenOCD will launch the GDB & telnet server even if it can not establish a connection with the target. In general, it is possible for the JTAG controller to be unresponsive until the target is set up correctly via e.g. GDB monitor commands in a GDB init script.

Simple Configuration Files
**************************

Outline
=======

There are 4 basic ways of ``configurating'' OpenOCD to run, they are:

 1. A small openocd.cfg file which ``sources'' other configuration files

 2. A monolithic openocd.cfg file

 3. Many -f filename options on the command line

 4. Your Mixed Solution

Small configuration file method
===============================

This is the prefered method, it is simple and is works well for many people.  The developers of OpenOCD would encourage you to use this method. If you create a new configuration please email new configurations to the development list.

Here is an example of an openocd.cfg file for an ATMEL at91sam7x256

     source [find interface/signalyzer.cfg]

     # Change the default telnet port...
     telnet_port 4444
     # GDB connects here
     gdb_port 3333
     # GDB can also flash my flash!
     gdb_memory_map enable
     gdb_flash_program enable

     source [find target/sam7x256.cfg]

There are many example configuration scripts you can work with. You should look in the directory: $(INSTALLDIR)/lib/openocd. You should find:

 1. board - eval board level configurations

 2. interface - specific dongle configurations

 3. target - the target chips

 4. tcl - helper scripts

 5. xscale - things specific to the xscale.

Look first in the ``boards'' area, then the ``targets'' area. Often a board configuration is a good example to work from.

Many -f filename options
========================

Some believe this is a wonderful solution, others find it painful.

You can use a series of ``-f filename'' options on the command line, OpenOCD will read each filename in sequence, for example:

             openocd -f file1.cfg -f file2.cfg -f file2.cfg

You can also intermix various commands with the ``-c'' command line option.

Monolithic file
===============

The ``Monolithic File'' dispenses with all ``source'' statements and puts everything in one self contained (monolithic) file. This is not encouraged.

Please try to ``source'' various files or use the multiple -f technique.

Advice for you
==============

Often, one uses a ``mixed approach''. Where possible, please try to ``source'' common things, and if needed cut/paste parts of the standard distribution configuration files as needed.

REMEMBER: The ``important parts'' of your configuration file are:

 1. Interface - Defines the dongle

 2. Taps - Defines the JTAG Taps

 3. GDB Targets - What GDB talks to

 4. Flash Programing - Very Helpful

Some key things you should look at and understand are:

 1. The RESET configuration of your debug environment as a hole

 2. Is there a ``work area'' that OpenOCD can use?

      For ARM - work areas mean up to 10x faster downloads.

 3. For MMU/MPU based ARM chips (ie: ARM9 and later) will that work area still be available?

 4. For complex targets (multiple chips) the JTAG SPEED becomes an issue.

Config File Guidelines
**********************

This section/chapter is aimed at developers and integrators of OpenOCD. These are guidelines for creating new boards and new target configurations as of 28/Nov/2008.

However, you the user of OpenOCD should be some what familiar with this section as it should help explain some of the internals of what you might be looking at.

The user should find under $(INSTALLDIR)/lib/openocd the following directories:

  * interface

     Think JTAG Dongle. Files that configure the jtag dongle go here.

  * board

      Thing Circuit Board, PWA, PCB, they go by many names.  Board files contain initialization items that are specific to a board - for example: The SDRAM initialization sequence for the board, or the type of external flash and what address it is found at. Any initialization sequence to enable that external flash or sdram should be found in the board file. Boards may also contain multiple targets, ie: Two cpus, or a CPU and an FPGA or CPLD.

  * target

      Think CHIP. The ``target'' directory represents a jtag tap (or chip) OpenOCD should control, not a board. Two common types of targets are ARM chips and FPGA or CPLD chips.

If needed... The user in their ``openocd.cfg'' file or the board file might override a specific feature in any of the above files by setting a variable or two before sourcing the target file. Or adding various commands specific to their situation.

Interface Config Files
======================

The user should be able to source one of these files via a command like this:

       source [find interface/FOOBAR.cfg]
     Or:
       openocd -f interface/FOOBAR.cfg

A preconfigured interface file should exist for every interface in use today, that said, perhaps some interfaces have only been used by the sole developer who created it.

FIXME/NOTE: We need to add support for a variable like TCL variable tcl_platform(platform), it should be called jim_platform (because it is jim, not real tcl) and it should contain 1 of 3 words: ``linux'', ``cygwin'' or ``mingw''

Interface files should be found in $(INSTALLDIR)/lib/openocd/interface

Board Config Files
==================

Note: BOARD directory NEW as of 28/nov/2008

The user should be able to source one of these files via a command like this:

       source [find board/FOOBAR.cfg]
     Or:
       openocd -f board/FOOBAR.cfg

The board file should contain one or more source [find target/FOO.cfg] statements along with any board specific things.

In summery the board files should contain (if present)

 1. External flash configuration (ie: the flash on CS0)

 2. SDRAM configuration (size, speed, etc)

 3. Board specific IO configuration (ie: GPIO pins might disable a 2nd flash)

 4. Multiple TARGET source statements

 5. All things that are not ``inside a chip''

 6. Things inside a chip go in a 'target' file

Target Config Files
===================

The user should be able to source one of these files via a command like this:

       source [find target/FOOBAR.cfg]
     Or:
       openocd -f target/FOOBAR.cfg

In summery the target files should contain

 1. Set Defaults

 2. Create Taps

 3. Reset Configuration

 4. Work Areas

 5. CPU/Chip/CPU-Core Specific features

 6. OnChip Flash

Important variable names
------------------------

By default, the end user should never need to set these variables. However, if the user needs to override a setting they only need to set the variable in a simple way.

  * CHIPNAME

      This gives a name to the overall chip, and is used as part of the tap identifier dotted name.

  * ENDIAN

      By default little - unless the chip or board is not normally used that way.

  * CPUTAPID

      When OpenOCD examines the JTAG chain, it will attempt to identify every chip. If the -expected-id is nonzero, OpenOCD attempts to verify the tap id number verses configuration file and may issue an error or warning like this. The hope is this will help pin point problem OpenOCD configurations.

          Info:   JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
          Error:  ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
          Error:  ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
          Error:  ERROR:      got: mfg: 0x787, part: 0xf0f0, ver: 0x3

  * _TARGETNAME

      By convention, this variable is created by the target configuration script. The board configuration file may make use of this variable to configure things like a ``reset init'' script, or other things specific to that board and that target.

     If the chip has 2 targets, use the names _TARGETNAME0, _TARGETNAME1, ... etc.

     Remember: The ``board file'' may include multiple targets.

     At no time should the name ``target0'' (the default target name if none was specified) be used. The name ``target0'' is a hard coded name - the next target on the board will be some other number.

     The user (or board file) should reasonably be able to:

             source [find target/FOO.cfg]
             $_TARGETNAME configure ... FOO specific parameters

             source [find target/BAR.cfg]
             $_TARGETNAME configure ... BAR specific parameters

TCL Variables Guide Line
------------------------

The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.

Thus the rule we follow in OpenOCD is this: Variables that begin with a leading underscore are temporal in nature, and can be modified and used at will within a ?TARGET? configuration file

EXAMPLE: The user should be able to do this:

        # Board has 3 chips,
        #    PXA270 #1 network side, big endian
        #    PXA270 #2 video side, little endian
        #    Xilinx    Glue logic
        set CHIPNAME network
        set ENDIAN big
        source [find target/pxa270.cfg]
        # variable: _TARGETNAME = network.cpu
        # other commands can refer to the "network.cpu" tap.
        $_TARGETNAME configure .... params for this cpu..

        set ENDIAN little
        set CHIPNAME video
        source [find target/pxa270.cfg]
        # variable: _TARGETNAME = video.cpu
        # other commands can refer to the "video.cpu" tap.
        $_TARGETNAME configure .... params for this cpu..

        unset ENDIAN
        set CHIPNAME xilinx
        source [find target/spartan3.cfg]

        # Since $_TARGETNAME is temporal..
        #  these names still work!
        network.cpu configure ... params
        video.cpu   configure ... params

Default Value Boiler Plate Code
-------------------------------

All target configuration files should start with this (or a modified form)

     # SIMPLE example
     if { [info exists CHIPNAME] } {
        set  _CHIPNAME $CHIPNAME
     } else {
        set  _CHIPNAME sam7x256
     }

     if { [info exists ENDIAN] } {
        set  _ENDIAN $ENDIAN
     } else {
        set  _ENDIAN little
     }

     if { [info exists CPUTAPID ] } {
        set _CPUTAPID $CPUTAPID
     } else {
        set _CPUTAPID 0x3f0f0f0f
     }

Creating Taps
-------------

After the ``defaults'' are choosen, [see above], the taps are created.

SIMPLE example: such as an Atmel AT91SAM7X256

     # for an ARM7TDMI.
     set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
     jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

COMPLEX example:

This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:

 1. Unform tap names - See: Tap Naming Convention

 2. _TARGETNAME is created at the end where used.

     if { [info exists FLASHTAPID ] } {
        set _FLASHTAPID $FLASHTAPID
     } else {
        set _FLASHTAPID 0x25966041
     }
     jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID

     if { [info exists CPUTAPID ] } {
        set _CPUTAPID $CPUTAPID
     } else {
        set _CPUTAPID 0x25966041
     }
     jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID

     if { [info exists BSTAPID ] } {
        set _BSTAPID $BSTAPID
     } else {
        set _BSTAPID 0x1457f041
     }
     jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID

     set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

Tap Naming Convention

See the command ``jtag newtap'' for detail, but in breif the names you should use are:

  * tap

  * cpu

  * flash

  * bs

  * jrc

  * unknownN - it happens :-(

Reset Configuration
-------------------

Some chips have specific ways the TRST and SRST signals are managed. If these are CHIP SPECIFIC they go here, if they are BOARD SPECIFIC they go in the board file.

Work Areas
----------

Work areas are small RAM areas used by OpenOCD to speed up downloads, and to download small snippits of code to program flash chips.

If the chip includes an form of ``on-chip-ram'' - and many do - define a reasonable work area and use the ``backup'' option.

PROBLEMS: On more complex chips, this ``work area'' may become inaccessable if/when the application code enables or disables the MMU.

ARM Core Specific Hacks
-----------------------

If the chip has a DCC, enable it. If the chip is an arm9 with some special high speed download - enable it.

If the chip has an ARM ``vector catch'' feature - by defeault enable it for Undefined Instructions, Data Abort, and Prefetch Abort, if the user is really writing a handler for those situations - they can easily disable it.  Experiance has shown the ``vector catch'' is helpful - for common programing errors.

If present, the MMU, the MPU and the CACHE should be disabled.

Internal Flash Configuration
----------------------------

This applies ONLY TO MICROCONTROLLERS that have flash built in.

Never ever in the ``target configuration file'' define any type of flash that is external to the chip. (For example the BOOT flash on Chip Select 0). The BOOT flash information goes in a board file - not the TARGET (chip) file.

Examples:

  * at91sam7x256 - has 256K flash YES enable it.

  * str912 - has flash internal YES enable it.

  * imx27 - uses boot flash on CS0 - it goes in the board file.

  * pxa270 - again - CS0 flash - it goes in the board file.

About JIM-Tcl
*************

OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can learn more about JIM here: http://jim.berlios.de

  * JIM vrs TCL

      JIM-TCL is a stripped down version of the well known Tcl language, which can be found here: http://www.tcl.tk. JIM-Tcl has far fewer features. JIM-Tcl is a single .C file and a single .H file and impliments the basic TCL command set along. In contrast: Tcl 8.6 is a 4.2MEG zip file containing 1540 files.

  * Missing Features

      Our practice has been: Add/clone the Real TCL feature if/when needed. We welcome JIM Tcl improvements, not bloat.

  * Scripts

      OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's command interpretor today (28/nov/2008) is a mixture of (newer) JIM-Tcl commands, and (older) the orginal command interpretor.

  * Commands

      At the OpenOCD telnet command line (or via the GDB mon command) one can type a Tcl for() loop, set variables, etc.

  * Historical Note

      JIM-Tcl was introduced to OpenOCD in Spring 2008.

  * Need a Crash Course In TCL?

      See: TCL Crash Course.

Daemon Configuration
********************

The commands here are commonly found in the openocd.cfg file and are used to specify what TCP/IP ports are used, and how GDB should be supported.

init
====

This command terminates the configuration stage and enters the normal command mode. This can be useful to add commands to the startup scripts and commands such as resetting the target, programming flash, etc. To reset the CPU upon startup, add "init" and "reset" at the end of the config script or at the end of the OpenOCD command line using the -c command line switch.

If this command does not appear in any startup/configuration file OpenOCD executes the command for you after processing all configuration files and/or command line options.

NOTE: This command normally occurs at or near the end of your openocd.cfg file to force OpenOCD to ``initialize'' and make the targets ready. For example: If your openocd.cfg file needs to read/write memory on your target - the init command must occur before the memory read/write commands.

TCP/IP Ports
============

  * telnet_port <NUMBER>

     Intended for a human. Port on which to listen for incoming telnet connections.

  * tcl_port <NUMBER>

     Intended as a machine interface. Port on which to listen for incoming TCL syntax. This port is intended as a simplified RPC connection that can be used by clients to issue commands and get the output from the TCL engine.

  * gdb_port <NUMBER>

     First port on which to listen for incoming GDB connections. The GDB port for the first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.

GDB Items
=========

  * gdb_breakpoint_override <HARD|SOFT|DISABLED>

     Force breakpoint type for gdb 'break' commands. The raison d'etre for this option is to support GDB GUI's without a hard/soft breakpoint concept where the default OpenOCD and GDB behaviour is not sufficient. Note that GDB will use hardware breakpoints if the memory map has been set up for flash regions.

     This option replaces older arm7_9 target commands that addressed the same issue.

  * gdb_detach <RESUME|RESET|HALT|NOTHING>

     Configures what OpenOCD will do when gdb detaches from the daeman. Default behaviour is <RESUME>

  * gdb_memory_map <ENABLE|DISABLE>

     Set to <ENABLE> to cause OpenOCD to send the memory configuration to gdb when requested. gdb will then know when to set hardware breakpoints, and program flash using the gdb load command. gdb_flash_program enable will also need enabling for flash programming to work. Default behaviour is <ENABLE> See gdb_flash_program.

  * gdb_flash_program <ENABLE|DISABLE>

     Set to <ENABLE> to cause OpenOCD to program the flash memory when a vFlash packet is received. Default behaviour is <ENABLE>

Interface - Dongle Configuration
********************************

Interface commands are normally found in an interface configuration file which is sourced by your openocd.cfg file. These commands tell OpenOCD what type of JTAG dongle you have and how to talk to it.

Simple Complete Interface Examples
==================================

A Turtelizer FT2232 Based JTAG Dongle
#interface
interface ft2232
ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
ft2232_layout turtelizer2
ft2232_vid_pid 0x0403 0xbdc8
A SEGGER Jlink
# jlink interface
interface jlink
A Raisonance RLink
# rlink interface
interface rlink
Parallel Port
interface parport
parport_port 0xc8b8
parport_cable wiggler
jtag_speed 0

Interface Conmmand
==================

The interface command tells OpenOCD what type of jtag dongle you are using. Depending upon the type of dongle, you may need to have one or more additional commands.

  * interface <NAME>

     Use the interface driver <NAME> to connect to the target. Currently supported interfaces are

       - parport

           PC parallel port bit-banging (Wigglers, PLD download cable, ...)

       - amt_jtagaccel

           Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP mode parallel port

       - ft2232

           FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only FTD2XX driver. The FTD2XX is superior in performance, but not available on every platform. The libftdi uses libusb, and should be portable to all systems that provide libusb.

       - ep93xx

          Cirrus Logic EP93xx based single-board computer bit-banging (in development)

       - presto

           ASIX PRESTO USB JTAG programmer.

       - usbprog

           usbprog is a freely programmable USB adapter.

       - gw16012

           Gateworks GW16012 JTAG programmer.

       - jlink

           Segger jlink usb adapter

       - rlink

           Raisonance RLink usb adapter

parport options
---------------

  * parport_port <NUMBER>

     Either the address of the I/O port (default: 0x378 for LPT1) or the number of the /dev/parport device

     When using PPDEV to access the parallel port, use the number of the parallel port: parport_port 0 (the default). If parport_port 0x378 is specified you may encounter a problem.

  * parport_cable <NAME>

     The layout of the parallel port cable used to connect to the target. Currently supported cables are

       - wiggler The original Wiggler layout, also supported by several clones, such as the Olimex ARM-JTAG

       - wiggler2 Same as original wiggler except an led is fitted on D5.

       - wiggler_ntrst_inverted Same as original wiggler except TRST is inverted.

       - old_amt_wiggler The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new version available from the website uses the original Wiggler layout ('WIGGLER')

       - chameleon The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to program the Chameleon itself, not a connected target.

       - dlc5 The Xilinx Parallel cable III.

       - triton The parallel port adapter found on the 'Karo Triton 1 Development Board'. This is also the layout used by the HollyGates design (see http://www.lartmaker.nl/projects/jtag/).

       - flashlink The ST Parallel cable.

       - arm-jtag Same as original wiggler except SRST and TRST connections reversed and TRST is also inverted.

       - altium Altium Universal JTAG cable.

  * parport_write_on_exit <ON|OFF>

     This will configure the parallel driver to write a known value to the parallel interface on exiting OpenOCD

amt_jtagaccel options
---------------------

  * parport_port <NUMBER>

     Either the address of the I/O port (default: 0x378 for LPT1) or the number of the /dev/parport device

ft2232 options
--------------

  * ft2232_device_desc <DESCRIPTION>

     The USB device description of the FTDI FT2232 device. If not specified, the FTDI default value is used. This setting is only valid if compiled with FTD2XX support.

     TODO: Confirm the following: On windows the name needs to end with a ``space A''? Or not? It has to do with the FTD2xx driver. When must this be added and when must it not be added? Why can't the code in the interface or in OpenOCD automatically add this if needed? -- Duane.

  * ft2232_serial <SERIAL-NUMBER>

     The serial number of the FTDI FT2232 device. If not specified, the FTDI default values are used.

  * ft2232_layout <NAME>

     The layout of the FT2232 GPIO signals used to control output-enables and reset signals. Valid layouts are

       - usbjtag "USBJTAG-1" layout described in the original OpenOCD diploma thesis

       - jtagkey Amontec JTAGkey and JTAGkey-tiny

       - signalyzer Signalyzer

       - olimex-jtag Olimex ARM-USB-OCD

       - m5960 American Microsystems M5960

       - evb_lm3s811 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or SRST signals on external connector

       - comstick Hitex STR9 comstick

       - stm32stick Hitex STM32 Performance Stick

       - flyswatter Tin Can Tools Flyswatter

       - turtelizer2 egnite Software turtelizer2

       - oocdlink OOCDLink

       - axm0432_jtag Axiom AXM-0432

  * ft2232_vid_pid <VID> <PID>

     The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI default values are used. Multiple <VID>, <PID> pairs may be given, eg.

          ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003

  * ft2232_latency <MS>

     On some systems using ft2232 based JTAG interfaces the FT_Read function call in ft2232_read() fails to return the expected number of bytes. This can be caused by USB communication delays and has proved hard to reproduce and debug. Setting the FT2232 latency timer to a larger value increases delays for short USB packages but it also reduces the risk of timeouts before receiving the expected number of bytes. The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.

ep93xx options
--------------

Currently, there are no options available for the ep93xx interface.

JTAG Speed
==========

  * jtag_khz <RESET SPEED KHZ>

     It is debatable if this command belongs here - or in a board configuration file. In fact, in some situations the jtag speed is changed during the target initialization process (ie: (1) slow at reset, (2) program the cpu clocks, (3) run fast)

     Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.

     Not all interfaces support ``rtck''. If the interface device can not support the rate asked for, or can not translate from kHz to jtag_speed, then an error is returned.

     Make sure the jtag clock is no more than 1/6th × CPU-Clock. This is especially true for synthesized cores (-S). Also see RTCK.

     NOTE: Script writers If the target chip requires/uses RTCK - please use the command: 'jtag_rclk FREQ'. This TCL proc (in startup.tcl) attempts to enable RTCK, if that fails it falls back to the specified frequency.

              # Fall back to 3mhz if RCLK is not supported
              jtag_rclk 3000

  * DEPRICATED jtag_speed - please use jtag_khz above.

     Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum speed. The actual effect of this option depends on the JTAG interface used.

     The speed used during reset can be adjusted using setting jtag_speed during pre_reset and post_reset events.

       - wiggler: maximum speed / NUMBER

       - ft2232: 6MHz / (NUMBER+1)

       - amt jtagaccel: 8 / 2**NUMBER

       - jlink: maximum speed in kHz (0-12000), 0 will use RTCK

       - rlink: 24MHz / NUMBER, but only for certain values of NUMBER

Reset Configuration
*******************

Every system configuration may require a different reset configuration. This can also be quite confusing. Please see the various board files for example.

jtag_nsrst_delay <MS>
=====================

How long (in milliseconds) OpenOCD should wait after deasserting nSRST before starting new JTAG operations.

jtag_ntrst_delay <MS>
=====================

Same jtag_nsrst_delay, but for nTRST

The jtag_n[st]rst_delay options are useful if reset circuitry (like a big resistor/capacitor, reset supervisor, or on-chip features). This keeps the signal asserted for some time after the external reset got deasserted.

reset_config
============

Note: To maintainer types and integrators. Where exactly the ``reset configuration'' goes is a good question. It touches several things at once. In the end, if you have a board file - the board file should define it and assume 100% that the DONGLE supports anything. However, that does not mean the target should not also make not of something the silicon vendor has done inside the chip. Grr.... nothing is every pretty.

 Problems:

 1. Every JTAG Dongle is slightly different, some dongles impliment reset differently.

 2. Every board is also slightly different; some boards tie TRST and SRST together.

 3. Every chip is slightly different; some chips internally tie the two signals together.

 4. Some may not impliment all of the signals the same way.

 5. Some signals might be push-pull, others open-drain/collector.

Best Case: OpenOCD can hold the SRST (push-button-reset), then reset the TAP via TRST and send commands through the JTAG tap to halt the CPU at the reset vector before the 1st instruction is executed, and finally release the SRST signal.

Depending upon your board vendor, your chip vendor, etc, these signals may have slightly different names.

OpenOCD defines these signals in these terms:

  * TRST - is Tap Reset - and should reset only the TAP.

  * SRST - is System Reset - typically equal to a reset push button.

The Command:

  * reset_config <SIGNALS> [COMBINATION] [TRST_TYPE] [SRST_TYPE]

      The reset_config command tells OpenOCD the reset configuration of your combination of Dongle, Board, and Chips. If the JTAG interface provides SRST, but the target doesn't connect that signal properly, then OpenOCD can't use it. <SIGNALS> can be none, trst_only, srst_only or trst_and_srst.

     [COMBINATION] is an optional value specifying broken reset signal implementations.  srst_pulls_trst states that the testlogic is reset together with the reset of the system (e.g. Philips LPC2000, "broken" board layout), trst_pulls_srst says that the system is reset together with the test logic (only hypothetical, I haven't seen hardware with such a bug, and can be worked around). combined imples both srst_pulls_trst and trst_pulls_srst.  The default behaviour if no option given is separate.

     The [TRST_TYPE] and [SRST_TYPE] parameters allow the driver type of the reset lines to be specified. Possible values are trst_push_pull (default) and trst_open_drain for the test reset signal, and srst_open_drain (default) and srst_push_pull for the system reset. These values only affect JTAG interfaces with support for different drivers, like the Amontec JTAGkey and JTAGAccelerator.

Tap Creation
************

In order for OpenOCD to control a target, a JTAG tap must be defined/created.

Commands to create taps are normally found in a configuration file and are not normally typed by a human.

When a tap is created a dotted.name is created for the tap. Other commands use that dotted.name to manipulate or refer to the tap.

Tap Uses:

  * Debug Target A tap can be used by a GDB debug target

  * Flash Programing Some chips program the flash via JTAG

  * Boundry Scan Some chips support boundry scan.

jtag newtap
===========

jtag newtap CHIPNAME TAPNAME  configparams ....

  * CHIPNAME

      is a symbolic name of the chip.

  * TAPNAME

      is a symbol name of a tap present on the chip.

  * Required configparams

      Every tap has 3 required configparams, and several ``optional parameters'', the required parameters are:

       * -irlen NUMBER - the length in bits of the instruction register

       * -ircapture NUMBER - the ID code capture command.

       * -irmask NUMBER - the corrisponding mask for the ir register.

     An example of a FOOBAR Tap

          jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55

     Creates the tap ``foobar.tap'' with the instruction register (IR) is 7 bits long, during Capture-IR 0x42 is loaded into the IR, and bits [6,4,2,0] are checked.

     FIXME: The IDCODE - this was not used in the old code, it should be? Right? -Duane.

  * Optional configparams

       * -expected-id NUMBER

           By default it is zero. If non-zero represents the expected tap ID used when the Jtag Chain is examined. See below.

       * -disable

       * -enable

           By default not specified the tap is enabled. Some chips have a jtag route controller (JRC) that is used to enable and/or disable specific jtag taps. You can later enable or disable any JTAG tap via the command jtag tapenable DOTTED.NAME or jtag tapdisable DOTTED.NAME

Notes:

  * Technically

      newtap is a sub command of the ``jtag'' command

  * Big Picture Background

     GDB Talks to OpenOCD using the GDB protocol via tcpip. OpenOCD then uses the JTAG interface (the dongle) to control the JTAG chain on your board. Your board has one or more chips in a daisy chain configuration. Each chip may have one or more jtag taps. GDB ends up talking via OpenOCD to one of the taps.

  * NAME Rules

     Names follow ``C'' symbol name rules (start with alpha ...)

  * TAPNAME - Conventions

       * tap - should be used only FPGA or CPLD like devices with a single tap.

       * cpu - the main cpu of the chip, alternatively foo.arm and foo.dsp

       * flash - if the chip has a flash tap, example: str912.flash

       * bs - for boundary scan if this is a seperate tap.

       * jrc - for jtag route controller (example: OMAP3530 found on Beagleboards)

       * unknownN - where N is a number if you have no idea what the tap is for

       * Other names - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.

       * When in doubt - use the chip makers name in their data sheet.

  * DOTTED.NAME

      CHIPNAME.TAPNAME creates the tap name, aka: the Dotted.Name is the CHIPNAME and TAPNAME combined with a dot (period); for example: xilinx.tap, str912.flash, omap3530.jrc, or stm32.cpu The dotted.name is used in numerous other places to refer to various taps.

  * ORDER

      The order this command appears via the config files is important.

  * Multi Tap Example

      This example is based on the ST Microsystems STR912. See the ST document titled: STR91xFAxxx, Section 3.15 Jtag Interface, Page: 28/102, Figure 3: Jtag chaining inside the STR91xFA.

     http://eu.st.com/stonline/products/literature/ds/13495.pdf

     checked: 28/nov/2008

     The diagram shows the TDO pin connects to the flash tap, flash TDI connects to the CPU debug tap, CPU TDI connects to the boundary scan tap which then connects to the TDI pin.

             # The order is...
             # create tap: 'str912.flash'
             jtag newtap str912 flash  ... params ...
             # create tap: 'str912.cpu'
             jtag newtap str912 cpu  ... params ...
             # create tap: 'str912.bs'
             jtag newtap str912 bs  ... params ...

  * Note: Deprecated - Index Numbers

      Prior to 28/nov/2008, JTAG taps where numbered from 0..N this feature is still present, however its use is highly discouraged and should not be counted upon.

  * Multiple chips

      If your board has multiple chips, you should be able to source two configuration files, in the proper order, and have the taps created in the proper order.

jtag_device - REMOVED
=====================

     jtag_device <IR LENGTH> <IR CAPTURE> <IR MASK> <IDCODE INSTRUCTION>

 Removed: 28/nov/2008 This command has been removed and replaced by the ``jtag newtap'' command. The documentation remains here so that one can easily convert the old syntax to the new syntax. About the old syntax: The old syntax is positional, ie: The 4th parameter is the ``irmask''. The new syntax requires named prefixes, and supports additional options, for example ``-irmask 4''. Please refer to the jtag newtap command for details.

     OLD: jtag_device 8 0x01 0x0e3 0xfe
     NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0xe3 -irmask 0xfe

Enable/Disable Taps
===================

Note: These commands are intended to be used as a machine/script interface. Humans might find the ``scan_chain'' command more helpful when querying the state of the JTAG taps.

By default, all taps are enabled

  * jtag tapenable DOTTED.NAME

  * jtag tapdisable DOTTED.NAME

  * jtag tapisenabled DOTTED.NAME

These commands are used when your target has a JTAG Route controller that effectively adds or removes a tap from the jtag chain in a non-standard way.

The ``standard way'' to remove a tap would be to place the tap in bypass mode. But with the advent of modern chips, this is not always a good solution. Some taps operate slowly, others operate fast, and there are other JTAG clock syncronization problems one must face. To solve that problem, the JTAG Route controller was introduced. Rather then ``bypass'' the tap, the tap is completely removed from the circuit and skipped.

From OpenOCD's view point, a JTAG TAP is in one of 3 states:

  * Enabled - Not In ByPass and has a variable bit length

  * Enabled - In ByPass and has a length of exactly 1 bit.

  * Disabled and has a length of ZERO and is removed from the circuit.

The IEEE JTAG definition has no concept of a ``disabled'' tap. Historical note: this feature was added 28/nov/2008

jtag tapisenabled DOTTED.NAME

This command returns 1 if the named tap is currently enabled, 0 if not. This command exists so that scripts that manipulate a JRC (like the Omap3530 has) can determine if OpenOCD thinks a tap is presently enabled, or disabled.

Target Configuration
********************

This chapter discusses how to create a GDB Debug Target.  Before creating a ``target'' a JTAG Tap DOTTED.NAME must exist first.

targets [NAME]
==============

Note: This command name is PLURAL - not singular.

With NO parameter, this plural targets command lists all known targets in a human friendly form.

With a parameter, this pural targets command sets the current target to the given name. (ie: If there are multiple debug targets)

Example:
(gdb) mon targets
      CmdName     Type     Endian    ChainPos   State
--  ---------- ---------- ---------- -------- ----------
    0: target0  arm7tdmi   little        0      halted

target COMMANDS
===============

Note: This command name is SINGULAR - not plural. It is used to manipulate specific targets, to create targets and other things.

Once a target is created, a TARGETNAME (object) command is created; see below for details.

The TARGET command accepts these sub-commands:

  * create .. parameters ..

      creates a new target, See below for details.

  * types

      Lists all supported target types (perhaps some are not yet in this document).

  * names

      Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
     	foreach t [target names] {
     	    puts [format "Target: %s\n" $t]
     	}

  * current

      Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way. By default, commands like: ``mww'' (used to write memory) operate on the current target.

  * number NUMBER

      Internally OpenOCD maintains a list of targets - in numerical index (0..N-1) this command returns the name of the target at index N. Example usage:
         set thename [target number $x]
         puts [format "Target %d is: %s\n" $x $thename]

  * count

      Returns the number of targets known to OpenOCD (see number above) Example:
         set c [target count]
         for { set x 0 } { $x < $c } { incr x } {
            	# Assuming you have created this function
            	print_target_details $x
         }

TARGETNAME (object) commands
============================

Use: Once a target is created, an ``object name'' that represents the target is created. By convention, the target name is identical to the tap name. In a multiple target system, one can preceed many common commands with a specific target name and effect only that target.

         str912.cpu    mww 0x1234 0x42
         omap3530.cpu  mww 0x5555 123

Model: The Tcl/Tk language has the concept of object commands. A good example is a on screen button, once a button is created a button has a name (a path in TK terms) and that name is useable as a 1st class command. For example in TK, one can create a button and later configure it like this:

         # Create
         button .foobar -background red -command { foo }
         # Modify
         .foobar configure -foreground blue
         # Query
         set x [.foobar cget -background]
         # Report
         puts [format "The button is %s" $x]

In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk button. Commands avaialble as a ``target object'' are:

  * configure - configure the target; see Target Config/Cget Options below

  * cget - query the target configuration; see Target Config/Cget Options below

  * curstate - current target state (running, halt, etc)

  * eventlist

      Intended for a human to see/read the currently configure target events.

  * Various Memory Commands See the ``mww'' command elsewhere.

       * mww ...

       * mwh ...

       * mwb ...

       * mdw ...

       * mdh ...

       * mdb ...

  * Memory To Array, Array To Memory

      These are aimed at a machine interface to memory

       * mem2array ARRAYNAME WIDTH ADDRESS COUNT

       * array2mem ARRAYNAME WIDTH ADDRESS COUNT

           Where:

             ARRAYNAME is the name of an array variable

             WIDTH is 8/16/32 - indicating the memory access size

             ADDRESS is the target memory address

             COUNT is the number of elements to process

  * Used during ``reset''

      These commands are used internally by the OpenOCD scripts to deal with odd reset situations and are not documented here.

       * arp_examine

       * arp_poll

       * arp_reset

       * arp_halt

       * arp_waitstate

  * invoke-event EVENT-NAME

      Invokes the specific event manually for the target

Target Events
=============

At various times, certain things can happen, or you want them to happen.

Examples:

  * What should happen when GDB connects? Should your target reset?

  * When GDB tries to flash the target, do you need to enable the flash via a special command?

  * During reset, do you need to write to certain memory location to reconfigure the SDRAM?

All of the above items are handled by target events.

To specify an event action, either during target creation, or later via ``$_TARGETNAME configure'' see this example.

Syntactially, the option is: ``-event NAME BODY'' where NAME is a target event name, and BODY is a tcl procedure or string of commands to execute.

The programmers model is the ``-command'' option used in Tcl/Tk buttons and events. Below are two identical examples, the first creates and invokes small procedure. The second inlines the procedure.

        proc my_attach_proc { } {
            puts "RESET...."
            reset halt
        }
        mychip.cpu configure -event gdb-attach my_attach_proc
        mychip.cpu configure -event gdb-attach { puts "Reset..." ; reset halt }

Current Events

  * debug-halted

      The target has halted for debug reasons (ie: breakpoint)

  * debug-resumed

      The target has resumed (ie: gdb said run)

  * early-halted

      Occurs early in the halt process

  * examine-end

      Currently not used (goal: when JTAG examine completes)

  * examine-start

      Currently not used (goal: when JTAG examine starts)

  * gdb-attach

      When GDB connects

  * gdb-detach

      When GDB disconnects

  * gdb-end

      When the taret has halted and GDB is not doing anything (see early halt)

  * gdb-flash-erase-start

      Before the GDB flash process tries to erase the flash

  * gdb-flash-erase-end

      After the GDB flash process has finished erasing the flash

  * gdb-flash-write-start

      Before GDB writes to the flash

  * gdb-flash-write-end

      After GDB writes to the flash

  * gdb-start

      Before the taret steps, gdb is trying to start/resume the tarfget

  * halted

      The target has halted

  * old-gdb_program_config

      DO NOT USE THIS: Used internally

  * old-pre_resume

      DO NOT USE THIS: Used internally

  * reset-assert-pre

      Before reset is asserted on the tap.

  * reset-assert-post

      Reset is now asserted on the tap.

  * reset-deassert-pre

      Reset is about to be released on the tap

  * reset-deassert-post

      Reset has been released on the tap

  * reset-end

      Currently not used.

  * reset-halt-post

      Currently not usd

  * reset-halt-pre

      Currently not used

  * reset-init

      Currently not used

  * reset-start

      Currently not used

  * reset-wait-pos

      Currently not used

  * reset-wait-pre

      Currently not used

  * resume-start

      Before any target is resumed

  * resume-end

      After all targets have resumed

  * resume-ok

      Success

  * resumed

      Target has resumed

target create
=============

     target create <NAME> <TYPE> <PARAMS ...>

This command creates a GDB debug target that refers to a specific JTAG tap.

  * NAME

      Is the name of the debug target. By convention it should be the tap DOTTED.NAME, this name is also used to create the target object command.

  * TYPE

      Specifies the target type, ie: arm7tdmi, or cortexM3. Currently supported targes are:

       - arm7tdmi

       - arm720t

       - arm9tdmi

       - arm920t

       - arm922t

       - arm926ejs

       - arm966e

       - cortex_m3

       - feroceon

       - xscale

       - arm11

       - mips_m4k

  * PARAMS

     PARAMs are various target configure parameters, the following are mandatory at configuration:

       * -endian big|little

       * -chain-position DOTTED.NAME

Target Config/Cget Options
==========================

These options can be specified when the target is created, or later via the configure option or to query the target via cget.

  * -type - returns the target type

  * -event NAME BODY see Target events

  * -work-area-virt [ADDRESS] specify/set the work area

  * -work-area-phys [ADDRESS] specify/set the work area

  * -work-area-size [ADDRESS] specify/set the work area

  * -work-area-backup [0|1] does the work area get backed up

  * -endian  [big|little]

  * -variant [NAME] some chips have varients OpenOCD needs to know about

  * -chain-position DOTTED.NAME the tap name this target refers to.

Example:

       for { set x 0 } { $x < [target count] } { incr x } {
         set name [target number $x]
         set y [$name cget -endian]
         set z [$name cget -type]
         puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
       }

Target Varients
===============

  * arm7tdmi

      Unknown (please write me)

  * arm720t

      Unknown (please write me) (simular to arm7tdmi)

  * arm9tdmi

      Varients: arm920t, arm922t and arm940t This enables the hardware single-stepping support found on these cores.

  * arm920t

      None.

  * arm966e

      None (this is also used as the ARM946)

  * cortex_m3

      use variant <-VARIANT LM3S> when debugging luminary lm3s targets. This will cause OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will be detected and the normal reset behaviour used.

  * xscale

      Supported variants are ixp42x, ixp45x, ixp46x,pxa250, pxa255, pxa26x.

  * arm11

      Supported variants are arm1136, arm1156, arm1176

  * mips_m4k

      Use variant ejtag_srst when debugging targets that do not provide a functional SRST line on the EJTAG connector.  This causes OpenOCD to instead use an EJTAG software reset command to reset the processor.  You still need to enable srst on the reset configuration command to enable OpenOCD hardware reset functionality.

working_area - Command Removed
==============================

Please use the ``$_TARGETNAME configure -work-area-... parameters instead

 This documentation remains because there are existing scripts that still use this that need to be converted.

       working_area target# address  size backup| [virtualaddress]

 The target# is a the 0 based target numerical index.

This command specifies a working area for the debugger to use. This may be used to speed-up downloads to target memory and flash operations, or to perform otherwise unavailable operations (some coprocessor operations on ARM7/9 systems, for example). The last parameter decides whether the memory should be preserved (<BACKUP>) or can simply be overwritten (<NOBACKUP>). If possible, use a working_area that doesn't need to be backed up, as performing a backup slows down operation.

Flash Programing
****************

Note: As of 28/nov/2008 OpenOCD does not know how to program a SPI flash that a micro may boot from. Perhaps you the reader would like to contribute support for this.

Flash Steps:

 1. Configure via the command flash bank

      Normally this is done in a configuration file.

 2. Operate on the flash via flash SOMECOMMAND

      Often commands to manipulate the flash are typed by a human, or run via a script in some automated way. For example: To program the boot flash on your board.

 3. GDB Flashing

      Flashing via GDB requires the flash be configured via ``flash bank'', and the GDB flash features be enabled. See the Daemon configuration section for more details.

Flash commands
==============

flash banks
-----------

flash banks

List configured flash banks

NOTE: the singular form: 'flash bank' is used to configure the flash banks.

flash info
----------

flash info <NUM>

Print info about flash bank <num>

flash probe
-----------

flash probe <NUM>

Identify the flash, or validate the parameters of the configured flash. Operation depends on the flash type.

flash erase_check
-----------------

flash erase_check <NUM>

Check erase state of sectors in flash bank <NUM>. This is the only operation that updates the erase state information displayed by flash info. That means you have to issue an erase_check command after erasing or programming the device to get updated information.

flash protect_check
-------------------

flash protect_check <NUM>

Check protection state of sectors in flash bank <num>. flash erase_sector using the same syntax.

flash erase_sector
------------------

flash erase_sector <NUM> <FIRST> <LAST>

Erase sectors at bank <NUM>, starting at sector <FIRST> up to and including <LAST>. Sector numbering starts at 0. Depending on the flash type, erasing may require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using the CFI driver).

flash erase_address
-------------------

flash erase_address <ADDRESS> <LENGTH>

Erase sectors starting at <ADDRESS> for <LENGTH> bytes

flash write_bank
----------------

flash write_bank <NUM> <FILE> <OFFSET>

Write the binary <FILE> to flash bank <NUM>, starting at <offset> bytes from the beginning of the bank.

flash write_image
-----------------

flash write_image [ERASE] <FILE> [OFFSET] [TYPE]

Write the image <FILE> to the current target's flash bank(s). A relocation [OFFSET] can be specified and the file [TYPE] can be specified explicitly as bin (binary), ihex (Intel hex), elf (ELF file) or s19 (Motorola s19). Flash memory will be erased prior to programming if the erase parameter is given.

flash protect
-------------

flash protect <NUM> <FIRST> <LAST> <on|off>

Enable (ON) or disable (OFF) protection of flash sectors <FIRST> to <LAST> of flash bank <NUM>.

mFlash commands
---------------

  * mflash probe Probe mflash.

  * mflash write <NUM> <FILE> <OFFSET> Write the binary <FILE> to mflash bank <NUM>, starting at <OFFSET> bytes from the beginning of the bank.

  * mflash dump <NUM> <FILE> <OFFSET> <SIZE> Dump <size> bytes, starting at <OFFSET> bytes from the beginning of the <NUM> bank to a <FILE>.

flash bank command
==================

The flash bank command is used to configure one or more flash chips (or banks in OpenOCD terms)

     flash bank <DRIVER> <BASE> <SIZE> <CHIP_WIDTH>
     <BUS_WIDTH> <TARGET#> [DRIVER_OPTIONS ...]

Configures a flash bank at <BASE> of <SIZE> bytes and <CHIP_WIDTH> and <BUS_WIDTH> bytes using the selected flash <driver>.

External Flash - cfi options
----------------------------

CFI flash are external flash chips - often they are connected to a specific chip select on the micro. By default at hard reset most micros have the ablity to ``boot'' from some flash chip - typically attached to the chips CS0 pin.

For other chip selects: OpenOCD does not know how to configure, or access a specific chip select. Instead you the human might need to via other commands (like: mww) configure additional chip selects, or perhaps configure a GPIO pin that controls the ``write protect'' pin on the FLASH chip.

flash bank cfi <BASE> <SIZE> <CHIP_WIDTH> <BUS_WIDTH> <TARGET#> [JEDEC_PROBE|X16_AS_X8]

CFI flashes require the number of the target they're connected to as an additional argument. The CFI driver makes use of a working area (specified for the target) to significantly speed up operation.

CHIP_WIDTH and BUS_WIDTH are specified in bytes.

The JEDEC_PROBE option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.

X16_AS_X8 ???

Internal Flash (Micro Controllers)
----------------------------------

lpc2000 options
...............

flash bank lpc2000 <BASE> <SIZE> 0 0 <TARGET#> <VARIANT> <CLOCK> [CALC_CHECKSUM]

LPC flashes don't require the chip and bus width to be specified. Additional parameters are the <VARIANT>, which may be LPC2000_V1 (older LPC21xx and LPC22xx) or LPC2000_V2 (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number of the target this flash belongs to (first is 0), the frequency at which the core is currently running (in kHz - must be an integral number), and the optional keyword CALC_CHECKSUM, telling the driver to calculate a valid checksum for the exception vector table.

at91sam7 options
................

flash bank at91sam7 0 0 0 0 <TARGET#>

AT91SAM7 flashes only require the TARGET#, all other values are looked up after reading the chip-id and type.

str7 options
............

flash bank str7x <BASE> <SIZE> 0 0 <TARGET#> <VARIANT>

variant can be either STR71x, STR73x or STR75x.

str9 options
............

flash bank str9x <BASE> <SIZE> 0 0 <TARGET#>

The str9 needs the flash controller to be configured prior to Flash programming, eg.

     str9x flash_config 0 4 2 0 0x80000

This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.

str9 options (str9xpec driver)
..............................

flash bank str9xpec <BASE> <SIZE> 0 0 <TARGET#>

Before using the flash commands the turbo mode will need enabling using str9xpec enable_turbo <NUM>.

Only use this driver for locking/unlocking the device or configuring the option bytes. Use the standard str9 driver for programming. See STR9 specific commands.

stellaris (LM3Sxxx) options
...........................

flash bank stellaris <BASE> <SIZE> 0 0 <TARGET#>

stellaris flash plugin only require the TARGET#.

stm32x options
..............

flash bank stm32x <BASE> <SIZE> 0 0 <TARGET#>

stm32x flash plugin only require the TARGET#.

aduc702x options
................

flash bank aduc702x <BASE> <SIZE> 0 0 <TARGET#>

aduc702x flash plugin require the flash BASE, SIZE and TARGET#.

mFlash configuration
--------------------

mflash bank <SOC> <BASE> <CHIP_WIDTH> <BUS_WIDTH> <RST PIN> <WP PIN> <DPD PIN> <TARGET #>

Configures a mflash for <SOC> host bank at <BASE>. <CHIP_WIDTH> and <BUS_WIDTH> are bytes order. Pin number format is dependent on host GPIO calling convention. If WP or DPD pin was not used, write -1. Currently, mflash bank support s3c2440 and pxa270.

(ex. of s3c2440) mflash <RST PIN> is GPIO B1, <WP PIN> and <DPD PIN> are not used.

     mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0

(ex. of pxa270) mflash <RST PIN> is GPIO 43, <DPD PIN> is not used and <DPD PIN> is GPIO 51.

     mflash bank pxa270 0x08000000 2 2 43 -1 51 0

Micro Controller Specific Flash Commands
========================================

AT91SAM7 specific commands
--------------------------

The flash configuration is deduced from the chip identification register. The flash controller handles erases automatically on a page (128/265 byte) basis so erase is not necessary for flash programming. AT91SAM7 processors with less than 512K flash only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes that can be erased separatly. Only an EraseAll command is supported by the controller for each flash plane and this is called with

  * flash erase <NUM> FIRST_PLANE LAST_PLANE

     bulk erase flash planes first_plane to last_plane.

  * at91sam7 gpnvm <NUM> <BIT> <set|clear>

     set or clear a gpnvm bit for the processor

STR9 specific commands
----------------------

These are flash specific commands when using the str9xpec driver.

  * str9xpec enable_turbo <NUM>

     enable turbo mode, simply this will remove the str9 from the chain and talk directly to the embedded flash controller.

  * str9xpec disable_turbo <NUM>

     restore the str9 into jtag chain.

  * str9xpec lock <NUM>

     lock str9 device. The str9 will only respond to an unlock command that will erase the device.

  * str9xpec unlock <NUM>

     unlock str9 device.

  * str9xpec options_read <NUM>

     read str9 option bytes.

  * str9xpec options_write <NUM>

     write str9 option bytes.

Note: Before using the str9xpec driver here is some background info to help you better understand how the drivers works. OpenOCD has two flash drivers for the str9.

 1. Standard driver str9x programmed via the str9 core. Normally used for flash programming as it is faster than the str9xpec driver.

 2. Direct programming str9xpec using the flash controller, this is ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9 core does not need to be running to program using this flash driver. Typical use for this driver is locking/unlocking the target and programming the option bytes.

Before we run any cmds using the str9xpec driver we must first disable the str9 core. This example assumes the str9xpec driver has been configured for flash bank 0.

     # assert srst, we do not want core running
     # while accessing str9xpec flash driver
     jtag_reset 0 1
     # turn off target polling
     poll off
     # disable str9 core
     str9xpec enable_turbo 0
     # read option bytes
     str9xpec options_read 0
     # re-enable str9 core
     str9xpec disable_turbo 0
     poll on
     reset halt

The above example will read the str9 option bytes. When performing a unlock remember that you will not be able to halt the str9 - it has been locked. Halting the core is not required for the str9xpec driver as mentioned above, just issue the cmds above manually or from a telnet prompt.

STR9 configuration
------------------

  * str9x flash_config <BANK> <BBSR> <NBBSR> <BBADR> <NBBADR>

     Configure str9 flash controller.

          eg. str9x flash_config 0 4 2 0 0x80000
          This will setup
          BBSR - Boot Bank Size register
          NBBSR - Non Boot Bank Size register
          BBADR - Boot Bank Start Address register
          NBBADR - Boot Bank Start Address register

STR9 option byte configuration
------------------------------

  * str9xpec options_cmap <NUM> <bank0|bank1>

     configure str9 boot bank.

  * str9xpec options_lvdthd <NUM> <2.4v|2.7v>

     configure str9 lvd threshold.

  * str9xpec options_lvdsel <NUM> <vdd|vdd_vddq>

     configure str9 lvd source.

  * str9xpec options_lvdwarn <BANK> <vdd|vdd_vddq>

     configure str9 lvd reset warning source.

STM32x specific commands
------------------------

These are flash specific commands when using the stm32x driver.

  * stm32x lock <NUM>

     lock stm32 device.

  * stm32x unlock <NUM>

     unlock stm32 device.

  * stm32x options_read <NUM>

     read stm32 option bytes.

  * stm32x options_write <NUM> <SWWDG|HWWDG> <RSTSTNDBY|NORSTSTNDBY> <RSTSTOP|NORSTSTOP>

     write stm32 option bytes.

  * stm32x mass_erase <NUM>

     mass erase flash memory.

Stellaris specific commands
---------------------------

These are flash specific commands when using the Stellaris driver.

  * stellaris mass_erase <NUM>

     mass erase flash memory.

General Commands
****************

The commands documented in this chapter here are common commands that you a human may want to type and see the output of. Configuration type commands are documented elsewhere.

Intent:

  * Source Of Commands

      OpenOCD commands can occur in a configuration script (discussed elsewhere) or typed manually by a human or supplied programatically, or via one of several Tcp/Ip Ports.

  * From the human

      A human should interact with the Telnet interface (default port: 4444, or via GDB, default port 3333)

     To issue commands from within a GDB session, use the monitor command, e.g. use monitor poll to issue the poll command. All output is relayed through the GDB session.

  * Machine Interface The TCL interface intent is to be a machine interface. The default TCL port is 5555.

Daemon Commands
===============

sleep
-----

sleep <MSEC>

Wait for n milliseconds before resuming. Useful in connection with script files (SCRIPT command and TARGET_SCRIPT configuration).

sleep
-----

shutdown

Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).

debug_level [N]
---------------

Display or adjust debug level to n<0-3>

fast [ENABLE|DISABLE]
---------------------

Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory downloads and fast memory access will work if the JTAG interface isn't too fast and the core doesn't run at a too low frequency. Note that this option only changes the default and that the indvidual options, like DCC memory downloads, can be enabled and disabled individually.

The target specific "dangerous" optimisation tweaking options may come and go as more robust and user friendly ways are found to ensure maximum throughput and robustness with a minimum of configuration.

Typically the "fast enable" is specified first on the command line:

     openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg

log_output <FILE>
-----------------

Redirect logging to <file> (default: stderr)

script <FILE>
-------------

Execute commands from <file> Also see: ``source [find FILENAME]''

Target state handling
=====================

power <ON|OFF>
--------------

Turn power switch to target on/off. No arguments: print status. Not all interfaces support this.

reg [#|name] [value]
--------------------

Access a single register by its number[#] or by its [name]. No arguments: list all available registers for the current target. Number or name argument: display a register Number or name and value arguments: set register value

poll [on|off]
-------------

Poll the target for its current state. If the target is in debug mode, architecture specific information about the current state is printed. An optional parameter allows continuous polling to be enabled and disabled.

halt [ms]
---------

Send a halt request to the target and wait for it to halt for up to [ms] milliseconds. Default [ms] is 5 seconds if no arg given. Optional arg ms is a timeout in milliseconds. Using 0 as the [ms] will stop OpenOCD from waiting.

wait_halt [ms]
--------------

Wait for the target to enter debug mode. Optional [ms] is a timeout in milliseconds. Default [ms] is 5 seconds if no arg given.

resume [ADDRESS]
----------------

Resume the target at its current code position, or at an optional address. OpenOCD will wait 5 seconds for the target to resume.

step [ADDRESS]
--------------

Single-step the target at its current code position, or at an optional address.

reset [run|halt|init]
---------------------

Perform a hard-reset. The optional parameter specifies what should happen after the reset.

With no arguments a "reset run" is executed

  - run

     Let the target run.

  - halt

     Immediately halt the target (works only with certain configurations).

  - init

     Immediately halt the target, and execute the reset script (works only with certain configurations)

soft_reset_halt
---------------

Requesting target halt and executing a soft reset.  This often used when a target cannot be reset and halted. The target, after reset is released begins to execute code. OpenOCD attempts to stop the CPU and then sets the Program counter back at the reset vector. Unfortunatlly that code that was executed may have left hardware in an unknown state.

Memory access commands
======================

meminfo
-------

display available ram memory.

Memory Peek/Poke type commands
------------------------------

These commands allow accesses of a specific size to the memory system. Often these are used to configure the current target in some special way. For example - one may need to write certian values to the SDRAM controller to enable SDRAM.

 1. To change the current target see the ``targets'' (plural) command

 2. In system level scripts these commands are depricated, please use the TARGET object versions.

  * mdw <ADDR> [COUNT]

     display memory words (32bit)

  * mdh <ADDR> [COUNT]

     display memory half-words (16bit)

  * mdb <ADDR> [COUNT]

     display memory bytes (8bit)

  * mww <ADDR> <VALUE>

     write memory word (32bit)

  * mwh <ADDR> <VALUE>

     write memory half-word (16bit)

  * mwb <ADDR> <VALUE>

     write memory byte (8bit)

Image Loading Commands
======================

load_image
----------

load_image <FILE> <ADDRESS> [bin|ihex|elf]

Load image <FILE> to target memory at <ADDRESS>

fast_load_image
---------------

fast_load_image <FILE> <ADDRESS> [bin|ihex|elf]

Normally you should be using load_image or GDB load. However, for testing purposes or when IO overhead is significant(OpenOCD running on embedded host), then storing the image in memory and uploading the image to the target can be a way to upload e.g. multiple debug sessions when the binary does not change. Arguments as load_image, but image is stored in OpenOCD host memory, i.e. does not affect target.  This approach is also useful when profiling target programming performance as IO and target programming can easily be profiled seperately.

fast_load
---------

fast_load

Loads image stored in memory by fast_load_image to current target. Must be preceeded by fast_load_image.

dump_image
----------

dump_image <FILE> <ADDRESS> <SIZE>

Dump <SIZE> bytes of target memory starting at <ADDRESS> to a (binary) <FILE>.

verify_image
------------

verify_image <FILE> <ADDRESS> [bin|ihex|elf]

Verify <FILE> against target memory starting at <ADDRESS>. This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.

Breakpoint commands
===================

  * bp <ADDR> <LEN> [HW]

     set breakpoint <address> <length> [hw]

  * rbp <ADDR>

     remove breakpoint <adress>

  * wp <ADDR> <LEN> <R|W|A> [VALUE] [MASK]

     set watchpoint <address> <length> <r/w/a> [value] [mask]

  * rwp <ADDR>

     remove watchpoint <adress>

Misc Commands
=============

  * profile <SECONDS> <GMON.OUT>

     Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.

Target Specific Commands
========================

Architecture Specific Commands
==============================

ARMV4/5 specific commands
-------------------------

These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems or Intel XScale (XScale isn't supported yet).

  * armv4_5 reg

     Display a list of all banked core registers, fetching the current value from every core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current register value.

  * armv4_5 core_mode [ARM|THUMB]

     Displays the core_mode, optionally changing it to either ARM or Thumb mode. The target is resumed in the currently set core_mode.

ARM7/9 specific commands
------------------------

These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t, ARM920t or ARM926EJ-S.

  * arm7_9 dbgrq <ENABLE|DISABLE>

     Enable use of the DBGRQ bit to force entry into debug mode. This should be safe for all but ARM7TDMI--S cores (like Philips LPC).

  * arm7_9 fast_memory_access <ENABLE|DISABLE>

     Allow OpenOCD to read and write memory without checking completion of the operation. This provides a huge speed increase, especially with USB JTAG cables (FT2232), but might be unsafe if used with targets running at a very low speed, like the 32kHz startup clock of an AT91RM9200.

  * arm7_9 dcc_downloads <ENABLE|DISABLE>

     Enable the use of the debug communications channel (DCC) to write larger (>128 byte) amounts of memory. DCC downloads offer a huge speed increase, but might be potentially unsafe, especially with targets running at a very low speed. This command was introduced with OpenOCD rev. 60.

ARM720T specific commands
-------------------------

  * arm720t cp15 <NUM> [VALUE]

     display/modify cp15 register <num> [value].

  * arm720t md<bhw>_phys <ADDR> [COUNT]

     Display memory at physical address addr.

  * arm720t mw<bhw>_phys <ADDR> <VALUE>

     Write memory at physical address addr.

  * arm720t virt2phys <VA>

     Translate a virtual address to a physical address.

ARM9TDMI specific commands
--------------------------

  * arm9tdmi vector_catch <ALL|NONE>

     Catch arm9 interrupt vectors, can be all none or any of the following: reset undef swi pabt dabt reserved irq fiq.

     Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.

ARM966E specific commands
-------------------------

  * arm966e cp15 <NUM> [VALUE]

     display/modify cp15 register <num> [value].

ARM920T specific commands
-------------------------

  * arm920t cp15 <NUM> [VALUE]

     display/modify cp15 register <num> [value].

  * arm920t cp15i <NUM> [VALUE] [ADDRESS]

     display/modify cp15 (interpreted access) <opcode> [value] [address]

  * arm920t cache_info

     Print information about the caches found. This allows you to see if your target is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).

  * arm920t md<bhw>_phys <ADDR> [COUNT]

     Display memory at physical address addr.

  * arm920t mw<bhw>_phys <ADDR> <VALUE>

     Write memory at physical address addr.

  * arm920t read_cache <FILENAME>

     Dump the content of ICache and DCache to a file.

  * arm920t read_mmu <FILENAME>

     Dump the content of the ITLB and DTLB to a file.

  * arm920t virt2phys <VA>

     Translate a virtual address to a physical address.

ARM926EJS specific commands
---------------------------

  * arm926ejs cp15 <NUM> [VALUE]

     display/modify cp15 register <num> [value].

  * arm926ejs cache_info

     Print information about the caches found.

  * arm926ejs md<bhw>_phys <ADDR> [COUNT]

     Display memory at physical address addr.

  * arm926ejs mw<bhw>_phys <ADDR> <VALUE>

     Write memory at physical address addr.

  * arm926ejs virt2phys <VA>

     Translate a virtual address to a physical address.

CORTEX_M3 specific commands
---------------------------

  * cortex_m3 maskisr <ON|OFF>

     Enable masking (disabling) interrupts during target step/resume.

Debug commands
==============

The following commands give direct access to the core, and are most likely only useful while debugging OpenOCD.

  * arm7_9 write_xpsr <32-BIT VALUE> <0=cpsr, 1=spsr>

     Immediately write either the current program status register (CPSR) or the saved program status register (SPSR), without changing the register cache (as displayed by the reg and armv4_5 reg commands).

  * arm7_9 write_xpsr_im8 <8-BIT VALUE> <ROTATE 4-BIT> <0=CPSR,1=SPSR>

     Write the 8-bit value rotated right by 2*rotate bits, using an immediate write operation (similar to write_xpsr).

  * arm7_9 write_core_reg <NUM> <MODE> <VALUE>

     Write a core register, without changing the register cache (as displayed by the reg and armv4_5 reg commands). The <MODE> argument takes the encoding of the [M4:M0] bits of the PSR.

Target Requests
===============

OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3. See libdcc in the contrib dir for more details.

  * target_request debugmsgs <ENABLE|DISABLE>

     Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.

JTAG Commands
*************

Generally most people will not use the bulk of these commands. They are mostly used by the OpenOCD developers or those who need to directly manipulate the JTAG taps.

In general these commands control JTAG taps at a very low level. For example if you need to control a JTAG Route Controller (ie: the OMAP3530 on the Beagle Board has one) you might use these commands in a script or an event procedure.

  * scan_chain

     Print current scan chain configuration.

  * jtag_reset <TRST> <SRST>

     Toggle reset lines.

  * endstate <TAP_STATE>

     Finish JTAG operations in <TAP_STATE>.

  * runtest <NUM_CYCLES>

     Move to Run-Test/Idle, and execute <NUM_CYCLES>

  * statemove [TAP_STATE]

     Move to current endstate or [TAP_STATE]

  * irscan <DEVICE> <INSTR> [DEV2] [INSTR2] ...

     Execute IR scan <DEVICE> <INSTR> [DEV2] [INSTR2] ...

  * drscan <DEVICE> [DEV2] [VAR2] ...

     Execute DR scan <DEVICE> [DEV2] [VAR2] ...

  * verify_ircapture <enable|disable>

     Verify value captured during Capture-IR. Default is enabled.

  * var <NAME> [NUM_FIELDS|DEL] [SIZE1] ...

     Allocate, display or delete variable <NAME> [NUM_FIELDS|DEL] [SIZE1] ...

  * field <VAR> <FIELD> [VALUE|FLIP] Display/modify variable field <VAR> <FIELD> [VALUE|FLIP].

TFTP
****

If OpenOCD runs on an embedded host(as ZY1000 does), then tftp can be used to access files on PCs(either developer PC or some other PC).

The way this works on the ZY1000 is to prefix a filename by "/tftp/ip/" and append the tftp path on the tftp server(tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as if the file was hosted on the embedded host.

In order to achieve decent performance, you must choose a tftp server that supports a packet size bigger than the default packet size(512 bytes). There are numerous tftp servers out there(free and commercial) and you will have to do a bit of googling to find something that fits your requirements.

Sample Scripts
**************

This page shows how to use the target library.

The configuration script can be divided in the following section:

  * daemon configuration

  * interface

  * jtag scan chain

  * target configuration

  * flash configuration

Detailed information about each section can be found at OpenOCD configuration.

AT91R40008 example
==================

To start OpenOCD with a target script for the AT91R40008 CPU and reset the CPU upon startup of the OpenOCD daemon.

     openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset

GDB and OpenOCD
***************

OpenOCD complies with the remote gdbserver protocol, and as such can be used to debug remote targets.

Connecting to GDB
=================

Use GDB 6.7 or newer with OpenOCD if you run into trouble. For instance 6.3 has a known bug where it produces bogus memory access errors, which has since been fixed: look up 1836 in http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb

OpenOCD can communicate with GDB in two ways:

 1. A socket (tcp) connection is typically started as follows:

          target remote localhost:3333

     This would cause GDB to connect to the gdbserver on the local pc using port 3333.

 2. A pipe connection is typically started as follows:

          target remote openocd --pipe

     This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout). Using this method has the advantage of GDB starting/stopping OpenOCD for debug session.

To see a list of available OpenOCD commands type monitor help on the GDB commandline.

OpenOCD supports the gdb qSupported packet, this enables information to be sent by the gdb server (OpenOCD) to GDB. Typical information includes packet size and device memory map.

Previous versions of OpenOCD required the following GDB options to increase the packet size and speed up GDB communication.

     set remote memory-write-packet-size 1024
     set remote memory-write-packet-size fixed
     set remote memory-read-packet-size 1024
     set remote memory-read-packet-size fixed

This is now handled in the qSupported PacketSize and should not be required.

Programming using GDB
=====================

By default the target memory map is sent to GDB, this can be disabled by the following OpenOCD config option:

     gdb_memory_map disable

For this to function correctly a valid flash config must also be configured in OpenOCD. For faster performance you should also configure a valid working area.

Informing GDB of the memory map of the target will enable GDB to protect any flash area of the target and use hardware breakpoints by default. This means that the OpenOCD option gdb_breakpoint_override is not required when using a memory map. See gdb_breakpoint_override.

To view the configured memory map in GDB, use the gdb command info mem All other unasigned addresses within GDB are treated as RAM.

GDB 6.8 and higher set any memory area not in the memory map as inaccessible, this can be changed to the old behaviour by using the following GDB command.

     set mem inaccessible-by-default off

If gdb_flash_program enable is also used, GDB will be able to program any flash memory using the vFlash interface.

GDB will look at the target memory map when a load command is given, if any areas to be programmed lie within the target flash area the vFlash packets will be used.

If the target needs configuring before GDB programming, an event script can be executed.

     $_TARGETNAME configure -event EVENTNAME BODY

To verify any flash programming the GDB command compare-sections can be used.

TCL scripting API
*****************

API rules

The commands are stateless. E.g. the telnet command line has a concept of currently active target, the Tcl API proc's take this sort of state information as an argument to each proc.

There are three main types of return values: single value, name value pair list and lists.

Name value pair. The proc 'foo' below returns a name/value pair list.

 >  set foo(me)  Duane
 >  set foo(you) Oyvind
 >  set foo(mouse) Micky
 >  set foo(duck) Donald

If one does this:

 >  set foo

The result is:

    me Duane you Oyvind mouse Micky duck Donald

Thus, to get the names of the associative array is easy:

     foreach  { name value }   [set foo]   {
                puts "Name: $name, Value: $value"
     }

Lists returned must be relatively small. Otherwise a range should be passed in to the proc in question.

Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks is the low level API upon which "flash banks" is implemented.

  * ocd_mem2array <VARNAME> <WIDTH> <ADDR> <NELEMS>

     Read memory and return as a TCL array for script processing

  * ocd_array2mem <VARNAME> <WIDTH> <ADDR> <NELEMS>

     Convert a TCL array to memory locations and write the values

  * ocd_flash_banks <DRIVER> <BASE> <SIZE> <CHIP_WIDTH> <BUS_WIDTH> <TARGET> [driver options ...]

     Return information about the flash banks

OpenOCD commands can consist of two words, e.g. "flash banks". The startup.tcl "unknown" proc will translate this into a tcl proc called "flash_banks".

Deprecated/Removed Commands
***************************

Certain OpenOCD commands have been deprecated/removed during the various revisions.

  * arm7_9 fast_writes

     use arm7_9 fast_memory_access command with same args. See arm7_9 fast_memory_access.

  * arm7_9 force_hw_bkpts

     Use gdb_breakpoint_override instead. Note that GDB will use hardware breakpoints for flash if the gdb memory map has been set up(default when flash is declared in target configuration). See gdb_breakpoint_override.

  * arm7_9 sw_bkpts

     On by default. See also gdb_breakpoint_override. See gdb_breakpoint_override.

  * daemon_startup

     this config option has been removed, simply adding init and reset halt to the end of your config script will give the same behaviour as using daemon_startup reset and target cortex_m3 little reset_halt 0.

  * dump_binary

     use dump_image command with same args. See dump_image.

  * flash erase

     use flash erase_sector command with same args. See flash erase_sector.

  * flash write

     use flash write_bank command with same args. See flash write_bank.

  * flash write_binary

     use flash write_bank command with same args. See flash write_bank.

  * flash auto_erase

     use flash write_image command passing erase as the first parameter. See flash write_image.

  * load_binary

     use load_image command with same args. See load_image.

  * run_and_halt_time

     This command has been removed for simpler reset behaviour, it can be simulated with the following commands:

          reset run
          sleep 100
          halt

  * target <TYPE> <ENDIAN> <JTAG-POSITION>

     use the create subcommand of target.

  * target_script <TARGET#> <EVENTNAME> <SCRIPTNAME>

     use <TARGET_NAME> configure -event <EVENTNAME> "script <SCRIPTNAME>"

  * working_area

     use the configure subcommand of target to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.

FAQ
***

 1. RTCK, also known as: Adaptive Clocking - What is it?

     In digital circuit design it is often refered to as ``clock syncronization'' the JTAG interface uses one clock (TCK or TCLK) operating at some speed, your target is operating at another.  The two clocks are not syncronized, they are ``asynchronous''

     In order for the two to work together they must syncronize. Otherwise the two systems will get out of sync with each other and nothing will work. There are 2 basic options. 1. use a special circuit or 2.  one clock must be some multile slower the the other.

     Does this really matter? For some chips and some situations, this is a non-issue (ie: A 500mhz ARM926) but for others - for example some ATMEL SAM7 and SAM9 chips start operation from reset at 32khz - program/enable the oscillators and eventually the main clock. It is in those critical times you must slow the jtag clock to sometimes 1 to 4khz.

     Imagine debugging that 500mhz arm926 hand held battery powered device that ``deep sleeps'' at 32khz between every keystroke. It can be painful.

     Solution #1 - A special circuit

     In order to make use of this your jtag dongle must support the RTCK feature. Not all dongles support this - keep reading!

     The RTCK signal often found in some ARM chips is used to help with this problem. ARM has a good description of the problem described at this link: http://www.arm.com/support/faqdev/4170.html [checked 28/nov/2008]. Link title: ``How does the jtag synchronisation logic work? / how does adaptive clocking working?''.

     The nice thing about adaptive clocking is that ``battery powered hand held device example'' - the adaptiveness works perfectly all the time. One can set a break point or halt the system in the deep power down code, slow step out until the system speeds up.

     Solution #2 - Always works - but is slower

     Often this is a perfectly acceptable solution.

     In the most simple terms: Often the JTAG clock must be 1/10 to 1/12 of the target clock speed. But what is that ``magic division'' it varies depending upon the chips on your board. ARM Rule of thumb Most ARM based systems require an 8:1 division. Xilinx Rule of thumb is 1/12 the clock speed.

     Note: Many FTDI2232C based JTAG dongles are limited to 6mhz.

     You can still debug the 'lower power' situations - you just need to manually adjust the clock speed at every step. While painful and teadious, it is not always practical.

     It is however easy to ``code your way around it'' - ie: Cheat a little have a special debug mode in your application that does a ``high power sleep''. If you are careful - 98% of your problems can be debugged this way.

     To set the JTAG frequency use the command:

                  # Example: 1.234mhz
                  jtag_khz 1234

 2. Win32 Pathnames Why does not backslashes in paths under Windows doesn't work?

     OpenOCD uses Tcl and a backslash is an escape char. Use { and } around Windows filenames.

          > echo \a

          > echo {\a}
          \a
          > echo "\a"

          >

 3. Missing: cygwin1.dll OpenOCD complains about a missing cygwin1.dll.

     Make sure you have Cygwin installed, or at least a version of OpenOCD that claims to come with all the necessary dlls. When using Cygwin, try launching OpenOCD from the Cygwin shell.

 4. Breakpoint Issue I'm trying to set a breakpoint using GDB (or a frontend like Insight or Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".

     GDB issues software breakpoints when a normal breakpoint is requested, or to implement source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t, software breakpoints consume one of the two available hardware breakpoints.

 5. LPC2000 Flash When erasing or writing LPC2000 on-chip flash, the operation fails sometimes and works sometimes fine.

     Make sure the core frequency specified in the flash lpc2000 line matches the clock at the time you're programming the flash. If you've specified the crystal's frequency, make sure the PLL is disabled, if you've specified the full core speed (e.g. 60MHz), make sure the PLL is enabled.

 6. Amontec Chameleon When debugging using an Amontec Chameleon in its JTAG Accelerator configuration, I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed out while waiting for end of scan, rtck was disabled".

     Make sure your PC's parallel port operates in EPP mode. You might have to try several settings in your PC BIOS (ECP, EPP, and different versions of those).

 7. Data Aborts When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse), I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory(): memory read caused data abort".

     The errors are non-fatal, and are the result of GDB trying to trace stack frames beyond the last valid frame. It might be possible to prevent this by setting up a proper "initial" stack frame, if you happen to know what exactly has to be done, feel free to add this here.

     Simple: In your startup code - push 8 registers of ZEROs onto the stack before calling main(). What GDB is doing is ``climbing'' the run time stack by reading various values on the stack using the standard call frame for the target. GDB keeps going - until one of 2 things happen #1 an invalid frame is found, or #2 some huge number of stackframes have been processed. By pushing ZEROs on the stack, GDB gracefully stops.

     Debugging Interrupt Service Routines - In your ISR before you call your C code, do the same, artifically push some zeros on to the stack, remember to pop them off when the ISR is done.

     Also note: If you have a multi-threaded operating system, they often do not in the intrest of saving memory waste these few bytes. Painful...

 8. JTAG Reset Config I get the following message in the OpenOCD console (or log file): "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".

     This warning doesn't indicate any serious problem, as long as you don't want to debug your core right out of reset. Your .cfg file specified jtag_reset trst_and_srst srst_pulls_trst to tell OpenOCD that either your board, your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals independently. With this setup, it's not possible to halt the core right out of reset, everything else should work fine.

 9. USB Power When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be unstable. When single-stepping over large blocks of code, GDB and OpenOCD quit with an error message. Is there a stability issue with OpenOCD?

     No, this is not a stability issue concerning OpenOCD. Most users have solved this issue by simply using a self-powered USB hub, which they connect their Amontec JTAGkey to. Apparently, some computers do not provide a USB power supply stable enough for the Amontec JTAGkey to be operated.

     Laptops running on battery have this problem too...

 10. USB Power When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned: 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232". What does that mean and what might be the reason for this?

     First of all, the reason might be the USB power supply. Try using a self-powered hub instead of a direct connection to your computer. Secondly, the error code 4 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB chip ran into some sort of error - this points us to a USB problem.

 11. GDB Disconnects When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054". What does that mean and what might be the reason for this?

     Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB) has closed the connection to OpenOCD. This might be a GDB issue.

 12. LPC2000 Flash In the configuration file in the section where flash device configurations are described, there is a parameter for specifying the clock frequency for LPC2000 internal flash devices (e.g.  flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum), which must be specified in kilohertz. However, I do have a quartz crystal of a frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz, i.e. 14,745.600 kHz).  Is it possible to specify real numbers for the clock frequency?

     No. The clock frequency specified here must be given as an integral number. However, this clock frequency is used by the In-Application-Programming (IAP) routines of the LPC2000 family only, which seems to be very tolerant concerning the given clock frequency, so a slight difference between the specified clock frequency and the actual clock frequency will not cause any trouble.

 13. Command Order Do I have to keep a specific order for the commands in the configuration file?

     Well, yes and no. Commands can be given in arbitrary order, yet the devices listed for the JTAG scan chain must be given in the right order (jtag newdevice), with the device closest to the TDO-Pin being listed first. In general, whenever objects of the same type exist which require an index number, then these objects must be given in the right order (jtag newtap, targets and flash banks - a target references a jtag newtap and a flash bank references a target).

     You can use the ``scan_chain'' command to verify and display the tap order.

 14. JTAG Tap Order JTAG Tap Order - Command Order

     Many newer devices have multiple JTAG taps. For example: ST Microsystems STM32 chips have two taps, a ``boundary scan tap'' and ``cortexM3'' tap.  Example: The STM32 reference manual, Document ID: RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is connected to the Boundary Scan Tap, which then connects to the CortexM3 Tap, which then connects to the TDO pin.

     Thus, the proper order for the STM32 chip is: (1) The CortexM3, then (2) The Boundary Scan Tap. If your board includes an additional JTAG chip in the scan chain (for example a Xilinx CPLD or FPGA) you could place it before or after the stm32 chip in the chain. For example:

       * OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)

       * STM32 BS TDO (output) -> STM32 CortexM3 TDI (input)

       * STM32 CortexM3 TDO (output) -> SM32 TDO Pin

       * STM32 TDO Pin (output) -> Xilinx TDI Pin (input)

       * Xilinx TDO Pin -> OpenOCD TDO (input)

     The ``jtag device'' commands would thus be in the order shown below. Note

       * jtag newtap Xilinx tap -irlen ...

       * jtag newtap stm32  cpu -irlen ...

       * jtag newtap stm32  bs  -irlen ...

       * # Create the debug target and say where it is

       * target create stm32.cpu -chain-position stm32.cpu ...

 15. SYSCOMP Sometimes my debugging session terminates with an error. When I look into the log file, I can see these error messages: Error: arm7_9_common.c:561 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP

     TODO.

TCL Crash Course
****************

Not everyone knows TCL - this is not intended to be a replacement for learning TCL, the intent of this chapter is to give you some idea of how the TCL Scripts work.

This chapter is written with two audiences in mind. (1) OpenOCD users who need to understand a bit more of how JIM-Tcl works so they can do something useful, and (2) those that want to add a new command to OpenOCD.

TCL Rule #1
===========

There is a famous joke, it goes like this:

 1. Rule #1: The wife is always correct

 2. Rule #2: If you think otherwise, See Rule #1

The TCL equal is this:

 1. Rule #1: Everything is a string

 2. Rule #2: If you think otherwise, See Rule #1

As in the famous joke, the consequences of Rule #1 are profound. Once you understand Rule #1, you will understand TCL.

TCL Rule #1b
============

There is a second pair of rules.

 1. Rule #1: Control flow does not exist. Only commands

      For example: the classic FOR loop or IF statement is not a control flow item, they are commands, there is no such thing as control flow in TCL.

 2. Rule #2: If you think otherwise, See Rule #1

      Actually what happens is this: There are commands that by convention, act like control flow key words in other languages. One of those commands is the word ``for'', another command is ``if''.

Per Rule #1 - All Results are strings
=====================================

Every TCL command results in a string. The word ``result'' is used deliberatly. No result is just an empty string. Remember: Rule #1 - Everything is a string

TCL Quoting Operators
=====================

In life of a TCL script, there are two important periods of time, the difference is subtle.

 1. Parse Time

 2. Evaluation Time

The two key items here are how ``quoted things'' work in TCL. TCL has three primary quoting constructs, the [square-brackets] the {curly-braces} and ``double-quotes''

By now you should know $VARIABLES always start with a $DOLLAR sign. BTW, to set a variable, you actually use the command ``set'', as in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x = 1'' statement, but without the equal sign.

  * [square-brackets]

      [square-brackets] are command subsitution. It operates much like Unix Shell `back-ticks`. The result of a [square-bracket] operation is exactly 1 string. Remember Rule #1 - Everything is a string. These two statments are roughly identical.

              # bash example
              X=`date`
              echo "The Date is: $X"
              # TCL example
              set X [date]
              puts "The Date is: $X"

  * ``double-quoted-things''

      ``double-quoted-things'' are just simply quoted text. $VARIABLES and [square-brackets] are expanded in place - the result however is exactly 1 string. Remember Rule #1 - Everything is a string

              set x "Dinner"
              puts "It is now \"[date]\", $x is in 1 hour"

  * {Curly-Braces}

     {Curly-Braces} are magic: $VARIABLES and [square-brackets] are parsed, but are NOT expanded or executed. {Curly-Braces} are like 'single-quote' operators in BASH shell scripts, with the added feature: {curly-braces} nest, single quotes can not.  {{{this is nested 3 times}}} NOTE: [date] is perhaps a bad example, as of 28/nov/2008, Jim/OpenOCD does not have a date command.

Consequences of Rule 1/2/3/4
============================

The consequences of Rule 1 is profound.

Tokenizing & Execution.
-----------------------

Of course, whitespace, blank lines and #comment lines are handled in the normal way.

As a script is parsed, each (multi) line in the script file is tokenized and according to the quoting rules. After tokenizing, that line is immedatly executed.

Multi line statements end with one or more ``still-open'' {curly-braces} which - eventually - a few lines later closes.

Command Execution
-----------------

Remember earlier: There is no such thing as ``control flow'' statements in TCL. Instead there are COMMANDS that simpily act like control flow operators.

Commands are executed like this:

 1. Parse the next line into (argc) and (argv[]).

 2. Look up (argv[0]) in a table and call its function.

 3. Repeat until End Of File.

It sort of works like this:

         for(;;){
             ReadAndParse( &argc, &argv );

             cmdPtr = LookupCommand( argv[0] );

             (*cmdPtr->Execute)( argc, argv );
         }

When the command ``proc'' is parsed (which creates a procedure function) it gets 3 parameters on the command line. 1 the name of the proc (function), 2 the list of parameters, and 3 the body of the function. Not the choice of words: LIST and BODY. The PROC command stores these items in a table somewhere so it can be found by ``LookupCommand()''

The FOR Command
---------------

The most interesting command to look at is the FOR command.  In TCL, the FOR command is normally implimented in C. Remember, FOR is a command just like any other command.

When the ascii text containing the FOR command is parsed, the parser produces 5 parameter strings, (If in doubt: Refer to Rule #1) they are:

 0. The ascii text 'for'

 1. The start text

 2. The test expression

 3. The next text

 4. The body text

Sort of reminds you of ``main( int argc, char **argv )'' does it not? Remember Rule #1 - Everything is a string. The key point is this: Often many of those parameters are in {curly-braces} - thus the variables inside are not expanded or replaced until later.

Remember that every TCL command looks like the classic ``main( argc, argv )'' function in C. In JimTCL - they actually look like this:

     int
     MyCommand( Jim_Interp *interp,
                int *argc,
                Jim_Obj * const *argvs );

Real TCL is nearly identical. Although the newer versions have introduced a byte-code parser and intepreter, but at the core, it still operates in the same basic way.

FOR Command Implimentation
--------------------------

To understand TCL it is perhaps most helpful to see the FOR command. Remember, it is a COMMAND not a control flow structure.

In TCL there are two underying C helper functions.

Remember Rule #1 - You are a string.

The first helper parses and executes commands found in an ascii string. Commands can be seperated by semi-colons, or newlines. While parsing, variables are expanded per the quoting rules

The second helper evaluates an ascii string as a numerical expression and returns a value.

Here is an example of how the FOR command could be implimented. The pseudo code below does not show error handling.

     void Execute_AsciiString( void *interp, const char *string );

     int Evaluate_AsciiExpression( void *interp, const char *string );

     int
     MyForCommand( void *interp,
                   int argc,
                   char **argv )
     {
        if( argc != 5 ){
            SetResult( interp, "WRONG number of parameters");
            return ERROR;
        }

        // argv[0] = the ascii string just like C

        // Execute the start statement.
        Execute_AsciiString( interp, argv[1] );

        // Top of loop test
        for(;;){
             i = Evaluate_AsciiExpression(interp, argv[2]);
             if( i == 0 )
                 break;

             // Execute the body
             Execute_AsciiString( interp, argv[3] );

             // Execute the LOOP  part
             Execute_AsciiString( interp, argv[4] );
         }

         // Return no error
         SetResult( interp, "" );
         return SUCCESS;
     }

Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works in the same basic way.

OpenOCD TCL Usage
=================

source and find commands
------------------------

Where: In many configuration files

 Example:  source [find FILENAME]

Remember the parsing rules

 1. The FIND command is in square brackets.

      The FIND command is executed with the parameter FILENAME. It should find the full path to the named file. The RESULT is a string, which is subsituted on the orginal command line.

 2. The command source is executed with the resulting filename.

      SOURCE reads a file and executes as a script.

format command
--------------

Where: Generally occurs in numerous places.

 TCL no command like printf(), intead it has format, which is really more like sprintf(). Example

         set x 6
         set y 7
         puts [format "The answer: %d" [expr $x * $y]]

 1. The SET command creates 2 variables, X and Y.

 2. The double [nested] EXPR command performs math

      The EXPR command produces numerical result as a string.

      Refer to Rule #1

 3. The format command is executed, producing a single string

      Refer to Rule #1.

 4. The PUTS command outputs the text.

Body Or Inlined Text
--------------------

Where: Various TARGET scripts.

     #1 Good
        proc someproc {} {
            ... multiple lines of stuff ...
        }
        $_TARGETNAME configure -event FOO  someproc
     #2 Good - no variables
        $_TARGETNAME confgure -event foo "this ; that;"
     #3 Good Curly Braces
        $_TARGETNAME configure -event FOO {
             puts "Time: [date]"
        }
     #4 DANGER DANGER DANGER
        $_TARGETNAME configure -event foo "puts \"Time: [date]\""

 1. The $_TARGETNAME is an OpenOCD variable convention.

     $_TARGETNAME represents the last target created, the value changes each time a new target is created. Remember the parsing rules. When the ascii text is parsed, the $_TARGETNAME becomes a simple string, the name of the target which happens to be a TARGET (object) command.

 2. The 2nd parameter to the -event parameter is a TCBODY

     There are 4 examples:

      1. The TCLBODY is a simple string that happens to be a proc name

      2. The TCLBODY is several simple commands semi-colon seperated

      3. The TCLBODY is a multi-line {curly-brace} quoted string

      4. The TCLBODY is a string with variables that get expanded.

     In the end, when the target event FOO occurs the TCLBODY is evaluated. Method #1 and #2 are functionally identical.  For Method #3 and #4 it is more interesting. What is the TCLBODY?

     Remember the parsing rules. In case #3, {curly-braces} mean the $VARS and [square-brackets] are expanded later, when the EVENT occurs, and the text is evaluated. In case #4, they are replaced before the ``Target Object Command'' is executed. This occurs at the same time $_TARGETNAME is replaced. In case #4 the date will never change. {BTW: [date] is perhaps a bad example, as of 28/nov/2008, Jim/OpenOCD does not have a date command}

Global Variables
----------------

Where: You might discover this when writing your own procs
 In simple terms: Inside a PROC, if you need to access a global variable you must say so. Also see ``upvar''. Example:

     proc myproc { } {
          set y 0  #Local variable Y
          global x #Global variable X
          puts [format "X=%d, Y=%d" $x $y]
     }

Other Tcl Hacks
===============

Dynamic Variable Creation

     # Dynamically create a bunch of variables.
     for { set x 0  } { $x < 32 } { set x [expr $x + 1]} {
         # Create var name
         set vn [format "BIT%d" $x]
         # Make it a global
         global $vn
         # Set it.
         set $vn   [expr (1 << $x)]
     }

Dynamic Proc/Command Creation

     # One "X" function - 5 uart functions.
     foreach who {A B C D E}
        proc [format "show_uart%c" $who] { } "show_UARTx $who"
     }

Target library
**************

OpenOCD comes with a target configuration script library. These scripts can be used as-is or serve as a starting point.

The target library is published together with the OpenOCD executable and the path to the target library is in the OpenOCD script search path. Similarly there are example scripts for configuring the JTAG interface.

The command line below uses the example parport configuration scripts that ship with OpenOCD, then configures the str710.cfg target and finally issues the init and reset command. The communication speed is set to 10kHz for reset and 8MHz for post reset.

     openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"

To list the target scripts available:

     $ ls  /usr/local/lib/openocd/target

     arm7_fast.cfg    lm3s6965.cfg  pxa255.cfg      stm32.cfg   xba_revA3.cfg
     at91eb40a.cfg    lpc2148.cfg   pxa255_sst.cfg  str710.cfg  zy1000.cfg
     at91r40008.cfg   lpc2294.cfg   sam7s256.cfg    str912.cfg
     at91sam9260.cfg  nslu2.cfg     sam7x256.cfg    wi-9c.cfg

     [file fdl.texi not included]