# Configuration for the ST SPEAr320 CPU board # EVAL_SPEAr320CPU Rev. 2.0 # http://www.st.com/spear # # Date: 2011-11-18 # Author: Antonio Borneo # The standard board has JTAG SRST not connected. # This script targets such boards using quirky code to bypass the issue. source [find mem_helper.tcl] source [find target/spear3xx.cfg] source [find chip/st/spear/spear3xx_ddr.tcl] source [find chip/st/spear/spear3xx.tcl] arm7_9 dcc_downloads enable arm7_9 fast_memory_access enable # Serial NOR on SMI CS0. 8Mbyte. set _FLASHNAME1 $_CHIPNAME.snor flash bank $_FLASHNAME1 stmsmi 0xf8000000 0 0 0 $_TARGETNAME if { [info exists BOARD_HAS_SRST] } { # Modified board has SRST on JTAG connector reset_config trst_and_srst separate srst_gates_jtag \ trst_push_pull srst_open_drain } else { # Standard board has no SRST on JTAG connector reset_config trst_only separate srst_gates_jtag trst_push_pull source [find chip/st/spear/quirk_no_srst.tcl] } $_TARGETNAME configure -event reset-init { spear320cpu_init } if { [info exists DDR_CHIPS] } { set _DDR_CHIPS $DDR_CHIPS } else { set _DDR_CHIPS 1 } proc spear320cpu_init {} { global _DDR_CHIPS reg pc 0xffff0020; # loop forever sp3xx_clock_default sp3xx_common_init sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $_DDR_CHIPS sp320_init }