# # Renesas Synergy S7 G2 w/ ARM Cortex-M4 @ 240 MHz # if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME s7g2 } if { [info exists CPU_JTAG_TAPID] } { set _CPU_JTAG_TAPID $CPU_JTAG_TAPID } else { set _CPU_JTAG_TAPID 0x5ba00477 } if { [info exists CPU_SWD_TAPID] } { set _CPU_SWD_TAPID $CPU_SWD_TAPID } else { set _CPU_SWD_TAPID 0x5ba02477 } source [find target/swj-dp.tcl] if { [using_jtag] } { set _CPU_TAPID $_CPU_JTAG_TAPID } else { set _CPU_TAPID $_CPU_SWD_TAPID } swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPU_TAPID dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap if { [info exists WORKAREASIZE] } { set _WORKAREASIZE $WORKAREASIZE } else { # 640 KB On-Chip SRAM set _WORKAREASIZE 0xa0000 } $_TARGETNAME configure -work-area-phys 0x1ffe0000 \ -work-area-size $_WORKAREASIZE -work-area-backup 0 if { ![using_hla] } { cortex_m reset_config sysresetreq } adapter_khz 1000