- openocd
-
- Free and Open On-Chip Debugging, In-System Programming
- and Boundary-Scan Testing
- Copyright (c) 2004, 2005 Dominic Rath
-
-The debugger uses an IEEE 1149-1 compliant JTAG TAP bus master to access on-chip
-debug functionality available on ARM7 and ARM9 based microcontrollers /
-system-on-chip solutions.
-
-User interaction is realized through a telnet command line interface and a gdb
-(The GNU Debugger) remote protocol server.
-
-Initially, support for two JTAG TAP bus master interfaces with public hardware
-schematics will be included, but support of additional hardware is an expressed
-goal.
-
-1. JTAG hardware
-
-Currently, openocd contains support for Wiggler-compatible paralell port
-dongles and a USB interface based on the FTDI FT2232, called USBJTAG-1.
-A new version of the USB interface, USB-JTAG v1.2, is available with complete
-schematics (http://www.fh-augsburg.de/~hhoegl/proj/volksmikro/usb-jtag/050910/).
-
-It was tested using Amontec's (www.amontec.com) Chameleon POD in it's
-Wiggler configuration, but homemade wigglers should work just as well.
-In order to use the reset functionality (warm-reset, debug from reset, reset
-and init), the choosen Wiggler has to connect the nSRST line.
-
-USBJTAG-1 is based on a FTDI DLP2232M module and a few additional parts.
-Schematics are freely available. USB-JTAG v1.2 doesn't use the DLP2232M, but
-has the FTDI chip soldered directly on the PCB. There are two drivers for these
-modules implemented, one using the open source libftdi, the other using FTDI's
-proprietary FTD2XX library.
-
-2. Supported cores
-
-This version of openocd supports the following cores:
-
-- ARM7TDMI
-- ARM9TDMI
-
-Support for cores with MMUs (ARM720t, ARM920t) is currently being merged.
-
-3. Licensing
-
-openocd is licensed under the terms of the GNU General Public License, see the
-file COPYING for details.
-
+ OpenOCD\r
+\r
+ Free and Open On-Chip Debugging, In-System Programming \r
+ and Boundary-Scan Testing\r
+ Copyright (c) 2004-2007 Dominic Rath\r
+\r
+The debugger uses an IEEE 1149-1 compliant JTAG TAP bus master to access on-chip\r
+debug functionality available on ARM7 and ARM9 based microcontrollers /\r
+system-on-chip solutions.\r
+\r
+User interaction is realized through a telnet command line interface and a gdb\r
+(The GNU Debugger) remote protocol server.\r
+\r
+1. JTAG hardware\r
+\r
+Currently, OpenOCD supports the following JTAG interfaces:\r
+\r
+- Parallel port wigglers. These devices connect to a PC's parallel port,\r
+providing direct access to the JTAG lines. The OpenOCD contains descriptions\r
+of a few Wiggler layouts, including the original 'Wiggler' design. Other\r
+layouts (i.e. mapping of parallel port pins to JTAG lines) can be added easily.\r
+Typical Wiggler speeds are around 12kByte/s code download to an ARM7's RAM.\r
+\r
+The list of supported parallel port devices includes:\r
+\r
+ * Macraigor Wiggler JTAG cable\r
+ * Gateworks GW16012 JTAG programmer\r
+ * Xilinx DLC5 JTAG parallel cable III\r
+ * Ka-Ro TRITON starterkit II JTAG cable\r
+ * Lattice parallel port JTAG cable\r
+ * ST FlashLINK programming cable\r
+\r
+- The Amontec JTAG Accelerator. This is a configuration for Amontec's Chameleon\r
+dongle, a parallel port interface based on a Xilinx CoolRunner CPLD. It uses\r
+the IEEE1284 EPP parallel port specification, providing many times the\r
+performance achievable with wiggler-style devices. Additional information is\r
+available on www.amontec.com.\r
+Typical JTAG Accelerator speeds are around 120-160kByte/s to an ARM7's RAM.\r
+\r
+- FTDI FT2232 based USB devices. The FT2232 (but not FT232 or FT245) features a\r
+multi-protocol synchronous serial engine (MPSSE) that can be used to run the\r
+serial JTAG protocol. There are several implemenations of FT2232 based devices:\r
+\r
+* USBJTAG: http://www.fh-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html\r
+The USBJTAG was designed by Prof. Hubert Hoegl to provide a high-speed USB\r
+interface for use with the OpenOCD. Schematics are available at the USBJTAG\r
+website, and a homebrew device can easily be built using the FTDI evaluation\r
+module DLP2232M.\r
+\r
+* OOCD-Link: http://www.joernonline.de/dw/doku.php?id=en:projects:oocdlink\r
+Similar to the USBJTAG, this design comes with free schematics, too.\r
+\r
+* Amontec JTAGkey: www.amontec.com\r
+The Amontec JTAGkey offers support for a wide variety of target voltages from\r
+1.4V to 5V. It also allows the JTAG lines and reset signals to be tri-stated,\r
+allowing easy interfacing with a wide variety of targets.\r
+\r
+* Amontec JTAGkey-Tiny: www.amontec.com\r
+The Amontec JTAGkey offers support for a wide variety of target voltages from\r
+2.8V to 5V. It also allows the reset signals to be tri-stated, allowing easy\r
+interfacing with a wide variety of targets.\r
+\r
+* Olimex ARM-USB-OCD: www.olimex.com\r
+The Olimex ARM-USB-OCD offers support for a wide vriety of target voltages from\r
+2.0V to 5V. It also allows targets to be powered from the ARM-USB-OCD and\r
+features and additional RS232 UART.\r
+\r
+* eVerve Signalyzer: www.signalyzer.com\r
+The Signalyzer offers support for a wide variety of target voltages from 1.2V to\r
+5.5V. A second connector provides access to a TTL level UART.\r
+\r
+* TinCanTools 'Flyswatter' USB JTAG programmer.\r
+\r
+* Turtelizer 2: http://www.ethernut.de/en/hardware/turtelizer/index.html\r
+Another USB JTAG programmer, with freely available schematics. It supports\r
+target voltages from 1.65V to 5.5V.\r
+\r
+* Hitex STR9-comSTICK: http://www.ehitex.de/p_info.php?products_id=292\r
+A STR912FW44x microcontroller "board" with USB and JTAG functionality.\r
+\r
+* Luminary Micro development board evb_lm3s811 JTAG interface.\r
+\r
+* ASIX PRESTO: http://www.asix-tools.com/prg_presto.htm\r
+The ASIX PRESTO is a USB JTAG programmer for a wide range of components, e.g.\r
+microcontrollers, serial EEPROM and Flash memory chips, CPLDs and others.\r
+\r
+* usbprog: http://www.embedded-projects.net/index.php?page_id=165\r
+The usbprog is a freely programmable USB adapter, which can (among other\r
+things) use a firmware which turns it into a JTAG programmer/debugger.\r
+\r
+All FT2232 based devices may be accessed using either FTDI's proprietary FTD2XX\r
+library (www.ftdichip.com) or using an open-source replacement from\r
+http://www.intra2net.com/de/produkte/opensource/ftdi/index.php, also included\r
+with many Linux distributions.\r
+\r
+2. Supported cores\r
+\r
+This version of openocd supports the following ARM7/9 cores:\r
+\r
+- ARM7TDMI(-s)\r
+- ARM9TDMI\r
+- ARM920t\r
+- ARM922t\r
+- ARM926ej-s\r
+- ARM966e\r
+- Cortex-M3\r
+\r
+Support for Intel XScale CPUs is also included:\r
+\r
+- PXA25x\r
+- PXA27x\r
+- IXP42x\r
+\r
+And support for the Marvell Feroceon CPU core as found in the\r
+Orion SOC family is included as well.\r
+\r
+3. Host platforms\r
+\r
+OpenOCD was originally developed on x86-Linux, but has since then been ported\r
+to run on Windows/Cygwin, native Windows with MinGW, FreeBSD, IA64-Linux,\r
+AMD64-Linux, Alpha-Linux, ARM-Linux, and PowerPC OS-X.\r
+\r
+4. Documentation\r
+\r
+Documentation for the OpenOCD is hosted in the Berlios OpenFacts Wiki at\r
+http://openfacts.berlios.de/index-en.phtml?title=Open_On-Chip_Debugger.\r
+\r
+5. Licensing\r
+\r
+OpenOCD is licensed under the terms of the GNU General Public License, see the\r
+file COPYING for details.\r
+\r