contrib: add source to the cfi flash loaders

[openocd.git] / contrib / loaders / flash / armv4_5_cfi_intel_16.s

diff --git a/contrib/loaders/flash/armv4_5_cfi_intel_16.s b/contrib/loaders/flash/armv4_5_cfi_intel_16.s
new file mode 100644 (file)
index 0000000..5283600
--- /dev/null
+++ b/contrib/loaders/flash/armv4_5_cfi_intel_16.s
@@ -0,0 +1,57 @@
+/***************************************************************************
+ *   Copyright (C) 2005, 2007 by Dominic Rath                              *
+ *   Dominic.Rath@gmx.de                                                   *
+ *   Copyright (C) 2010 Spencer Oliver                                     *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+       .text
+       .arm
+       .arch armv4
+
+       .section .init
+
+/* algorithm register usage:
+ * r0: source address (in RAM)
+ * r1: target address (in Flash)
+ * r2: count
+ * r3: flash write command
+ * r4: status byte (returned to host)
+ * r5: busy test pattern
+ * r6: error test pattern
+ */
+
+loop:
+       ldrh    r4, [r0], #2
+       strh    r3, [r1]
+       strh    r4, [r1]
+busy:
+       ldrh    r4, [r1]
+       and             r7, r4, r5
+       cmp             r7, r5
+       bne             busy
+       tst             r4, r6
+       bne             done
+       subs    r2, r2, #1
+       beq             done
+       add             r1, r1, #2
+       b               loop
+done:
+       b               done
+
+       .end