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[openocd.git] / doc / openocd.texi

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 4404807a639c9be22a96f3fc263ca95de2c2e39c..138922d08d834cbe7a4f3e1ba74799e04bd005ef 100644 (file)
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -265,7 +265,7 @@ listed in the Doxyfile configuration at the top of the source tree.
 All changes in the OpenOCD Git repository go through the web-based Gerrit
 Code Review System:
 
-@uref{http://openocd.zylin.com/}
+@uref{https://review.openocd.org/}
 
 After a one-time registration and repository setup, anyone can push commits
 from their local Git repository directly into Gerrit.
@@ -6777,6 +6777,17 @@ Show information about flash driver.
 
 @end deffn
 
+@deffn {Flash Driver} {npcx}
+All versions of the NPCX microcontroller families from Nuvoton include internal
+flash. The NPCX flash driver supports the NPCX family of devices. The driver
+automatically recognizes the specific version's flash parameters and
+autoconfigures itself. The flash bank starts at address 0x64000000.
+
+@example
+flash bank $_FLASHNAME npcx 0x64000000 0 0 0 $_TARGETNAME
+@end example
+@end deffn
+
 @deffn {Flash Driver} {nrf5}
 All members of the nRF51 microcontroller families from Nordic Semiconductor
 include internal flash and use ARM Cortex-M0 core.
@@ -7302,7 +7313,7 @@ The @var{num} parameter is a value shown by @command{flash banks}.
 @end deffn
 
 @deffn {Flash Driver} {stm32l4x}
-All members of the STM32 G0, G4, L4, L4+, L5, WB and WL
+All members of the STM32 G0, G4, L4, L4+, L5, U5, WB and WL
 microcontroller families from STMicroelectronics include internal flash
 and use ARM Cortex-M0+, M4 and M33 cores.
 The driver automatically recognizes a number of these chips using
@@ -7337,18 +7348,15 @@ Some stm32l4x-specific commands are defined:
 @deffn {Command} {stm32l4x lock} num
 Locks the entire stm32 device.
 The @var{num} parameter is a value shown by @command{flash banks}.
+
+@emph{Note:} To apply the protection change immediately, use @command{stm32l4x option_load}.
 @end deffn
 
 @deffn {Command} {stm32l4x unlock} num
 Unlocks the entire stm32 device.
 The @var{num} parameter is a value shown by @command{flash banks}.
-@end deffn
 
-@deffn Command {stm32l4x flashloader} num [@option{enable} | @option{disable}]
-Enables or disables the flashloader usage (enabled by default),
-when disabled it will fall back to direct memory access to program the Flash or OTP memories.
-if neither @option{enabled} nor @option{disable} are specified, the command will display
-the current configuration.
+@emph{Note:} To apply the protection change immediately, use @command{stm32l4x option_load}.
 @end deffn
 
 @deffn {Command} {stm32l4x mass_erase} num
@@ -7379,6 +7387,8 @@ The @var{num} parameter is a value shown by @command{flash banks}, @var{reg_offs
 is the register offset of the Option byte to write, and @var{reg_mask} is the mask
 to apply when writing the register (only bits with a '1' will be touched).
 
+@emph{Note:} To apply the option bytes change immediately, use @command{stm32l4x option_load}.
+
 For example to write the WRP1AR option bytes:
 @example
 stm32l4x option_write 0 0x28 0x00FF0000 0x00FF00FF