\input texinfo @c -*-texinfo-*-
@c %**start of header
@setfilename openocd.info
-@settitle Open On-Chip Debugger (openocd)
+@settitle Open On-Chip Debugger (OpenOCD)
@dircategory Development
@direntry
* OpenOCD: (openocd). Open On-Chip Debugger.
@end copying
@titlepage
-@title Open On-Chip Debugger (openocd)
-@subtitle Edition @value{EDITION} for openocd version @value{VERSION}
+@title Open On-Chip Debugger (OpenOCD)
+@subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
@subtitle @value{UPDATED}
@page
@vskip 0pt plus 1filll
@top OpenOCD
This manual documents edition @value{EDITION} of the Open On-Chip Debugger
-(openocd) version @value{VERSION}, @value{UPDATED}.
+(OpenOCD) version @value{VERSION}, @value{UPDATED}.
@insertcopying
@menu
-* About:: About Openocd.
-* Developers:: Openocd developers
-* Building:: Building Openocd
-* Running:: Running Openocd
-* Configuration:: Openocd Configuration.
-* Commands:: Openocd Commands
+* About:: About OpenOCD.
+* Developers:: OpenOCD developers
+* Building:: Building OpenOCD
+* Running:: Running OpenOCD
+* Configuration:: OpenOCD Configuration.
+* Target library:: Target library
+* Commands:: OpenOCD Commands
* Sample Scripts:: Sample Target Scripts
-* GDB and Openocd:: Using GDB and Openocd
+* GDB and OpenOCD:: Using GDB and OpenOCD
+* TCL and OpenOCD:: Using TCL and OpenOCD
* Upgrading:: Deprecated/Removed Commands
* FAQ:: Frequently Asked Questions
* License:: GNU Free Documentation License
@unnumbered About
@cindex about
-The Open On-Chip Debugger (openocd) aims to provide debugging, in-system programming
+The Open On-Chip Debugger (OpenOCD) aims to provide debugging, in-system programming
and boundary-scan testing for embedded target devices. The targets are interfaced
using JTAG (IEEE 1149.1) compliant hardware, but this may be extended to other
connection types in the future.
-Openocd currently supports Wiggler (clones), FTDI FT2232 based JTAG interfaces, the
+OpenOCD currently supports Wiggler (clones), FTDI FT2232 based JTAG interfaces, the
Amontec JTAG Accelerator, and the Gateworks GW1602. It allows ARM7 (ARM7TDMI and ARM720t),
ARM9 (ARM920t, ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be debugged.
@chapter Developers
@cindex developers
-Openocd has been created by Dominic Rath as part of a diploma thesis written at the
+OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
Others interested in improving the state of free and open debug and testing technology
are welcome to participate.
Other developers have contributed support for additional targets and flashes as well
as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
+The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}
+
@node Building
@chapter Building
-@cindex building openocd
+@cindex building OpenOCD
You can download the current SVN version with SVN client of your choice from the
following repositories:
(@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk})
-Using the SVN command line client, you could use the following command to fetch the
+Using the SVN command line client, you can use the following command to fetch the
latest version (make sure there is no (non-svn) directory called "openocd" in the
current directory):
svn checkout svn://svn.berlios.de/openocd/trunk openocd
@end smallexample
-Building the OpenOCD requires a recent version of the GNU autotools.
+Building OpenOCD requires a recent version of the GNU autotools.
On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
@end itemize
-Please note that the ftdi2232 variant (using libftdi) isn't supported under Cygwin.
-You have to use the ftd2xx variant (using FTDI's D2XX) on Cygwin.
+libftdi is supported under windows. Versions earlier than 0.13 will require patching.
+see contrib/libftdi for more details.
In general, the D2XX driver provides superior performance (several times as fast),
-but has the draw-back of being binary-only - though that isn't as worse, as it isn't
+but has the draw-back of being binary-only - though that isn't that bad, as it isn't
a kernel module, only a user space library.
To build OpenOCD (on both Linux and Cygwin), use the following commands:
@smallexample
make
@end smallexample
-Make builds the OpenOCD, and places the final executable in ./src/.
+Make builds OpenOCD, and places the final executable in ./src/.
The configure script takes several options, specifying which JTAG interfaces
should be included:
@item
@option{--enable-ft2232_ftd2xx}
@footnote{Using the latest D2XX drivers from FTDI and following their installation
-instructions, I had to use @option{--enable-ft2232_libftd2xx} for the OpenOCD to
+instructions, I had to use @option{--enable-ft2232_libftd2xx} for OpenOCD to
build properly.}
@item
@option{--enable-ft2232_libftdi}
@option{--enable-presto_libftdi}
@item
@option{--enable-presto_ftd2xx}
+@item
+@option{--enable-jlink}
@end itemize
If you want to access the parallel port using the PPDEV interface you have to specify
@node Running
@chapter Running
-@cindex running openocd
+@cindex running OpenOCD
@cindex --configfile
@cindex --debug_level
@cindex --logfile
@cindex --search
-The OpenOCD runs as a daemon, waiting for connections from clients (Telnet or GDB).
-Run with @option{--help} or @option{-h} to view the available command line arguments.
+OpenOCD runs as a daemon, waiting for connections from clients (Telnet, GDB, Other).
+Run with @option{--help} or @option{-h} to view the available command line switches.
It reads its configuration by default from the file openocd.cfg located in the current
working directory. This may be overwritten with the @option{-f <configfile>} command line
-switch.
+switch. The @option{-f} command line switch can be specified multiple times, in which case the config files
+are executed in order.
+
+Also it is possible to interleave commands w/config scripts using the @option{-c} command line switch.
To enable debug output (when reporting problems or working on OpenOCD itself), use
the @option{-d} command line switch. This sets the debug_level to "3", outputting
You can redirect all output from the daemon to a file using the @option{-l <logfile>} switch.
-Search paths for config/script files can be added to openocd by using
-the @option{-s <search>} switch.
+Search paths for config/script files can be added to OpenOCD by using
+the @option{-s <search>} switch. The current directory and the OpenOCD target library
+is in the search path by default.
+
+Note! OpenOCD will launch the GDB & telnet server even if it can not establish a connection
+with the target. In general, it is possible for the JTAG controller to be unresponsive until
+the target is set up correctly via e.g. GDB monitor commands in a GDB init script.
@node Configuration
@chapter Configuration
@cindex configuration
-The Open On-Chip Debugger (OpenOCD) runs as a daemon, and reads it current configuration
+OpenOCD runs as a daemon, and reads it current configuration
by default from the file openocd.cfg in the current directory. A different configuration
-file can be specified with the @option{-f <conf.file>} given at the openocd command line.
+file can be specified with the @option{-f <conf.file>} command line switch specified when starting OpenOCD.
The configuration file is used to specify on which ports the daemon listens for new
connections, the JTAG interface used to connect to the target, the layout of the JTAG
@section Daemon configuration
@itemize @bullet
+@item @b{init} This command terminates the configuration stage and enters the normal
+command mode. This can be useful to add commands to the startup scripts and commands
+such as resetting the target, programming flash, etc. To reset the CPU upon startup,
+add "init" and "reset" at the end of the config script or at the end of the
+OpenOCD command line using the @option{-c} command line switch.
+@cindex init
@item @b{telnet_port} <@var{number}>
@cindex telnet_port
Port on which to listen for incoming telnet connections
first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
@item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
@cindex gdb_detach
-Configures what openocd will do when gdb detaches from the daeman.
+Configures what OpenOCD will do when gdb detaches from the daeman.
Default behaviour is <@var{resume}>
@item @b{gdb_memory_map} <@var{enable|disable}>
@cindex gdb_memory_map
-Set to <@var{enable}> so that openocd will send the memory configuration to gdb when
+Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
requested. gdb will then know when to set hardware breakpoints, and program flash
using the gdb load command. @option{gdb_flash_program enable} will also need enabling
for flash programming to work.
-Default behaviour is <@var{disable}>
+Default behaviour is <@var{enable}>
@item @b{gdb_flash_program} <@var{enable|disable}>
@cindex gdb_flash_program
-Set to <@var{enable}> so that openocd will program the flash memory when a
+Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
vFlash packet is received.
-Default behaviour is <@var{disable}>
+Default behaviour is <@var{enable}>
+ at item @b{tcl_port} <@var{number}>
+ at cindex tcl_port
+Port on which to listen for incoming TCL syntax. This port is intended as
+a simplified RPC connection that can be used by clients to issue commands
+and get the output from the TCL engine.
@item @b{daemon_startup} <@var{mode}>
@cindex daemon_startup
@option{mode} can either @option{attach} or @option{reset}
-Tells the OpenOCD whether it should reset the target when the daemon is launched, or
-if it should just attach to the target.
+This is equivalent to adding "init" and "reset" to the end of the config script.
+
+It is available as a command mainly for backwards compatibility.
@end itemize
@section JTAG interface configuration
@item @b{gw16012}
Gateworks GW16012 JTAG programmer.
@end itemize
+@itemize @minus
+@item @b{jlink}
+Segger jlink usb adapter
+@end itemize
@end itemize
@itemize @bullet
@item wiggler: maximum speed / @var{number}
@item ft2232: 6MHz / (@var{number}+1)
@item amt jtagaccel: 8 / 2**@var{number}
+@item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
@end itemize
Note: Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
@item @b{jtag_nsrst_delay} <@var{ms}>
@cindex jtag_nsrst_delay
-How long (in miliseconds) the OpenOCD should wait after deasserting nSRST before
+How long (in milliseconds) OpenOCD should wait after deasserting nSRST before
starting new JTAG operations.
@item @b{jtag_ntrst_delay} <@var{ms}>
@cindex jtag_ntrst_delay
-How long (in miliseconds) the OpenOCD should wait after deasserting nTRST before
+How long (in milliseconds) OpenOCD should wait after deasserting nTRST before
starting new JTAG operations.
The jtag_n[st]rst_delay options are useful if reset circuitry (like a reset supervisor,
@itemize @minus
@item @b{wiggler}
@cindex wiggler
-Original Wiggler layout, also supported by several clones, such
+The original Wiggler layout, also supported by several clones, such
as the Olimex ARM-JTAG
@item @b{old_amt_wiggler}
@cindex old_amt_wiggler
version available from the website uses the original Wiggler layout ('@var{wiggler}')
@item @b{chameleon}
@cindex chameleon
-Describes the connection of the Amontec Chameleon's CPLD when operated in
-configuration mode. This is only used to program the Chameleon itself, not
-a connected target.
+The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to program the Chameleon itself, not a connected target.
@item @b{dlc5}
@cindex dlc5
-Xilinx Parallel cable III.
+The Xilinx Parallel cable III.
@item @b{triton}
@cindex triton
The parallel port adapter found on the 'Karo Triton 1 Development Board'.
(see @uref{http://www.lartmaker.nl/projects/jtag/}).
@item @b{flashlink}
@cindex flashlink
-ST Parallel cable.
+The ST Parallel cable.
@end itemize
@item @b{parport_write_on_exit} <@var{on|off}>
@cindex parport_write_on_exit
This will configure the parallel driver to write a known value to the parallel
-interface on exiting openocd
+interface on exiting OpenOCD
@end itemize
@section amt_jtagaccel options
signals. Valid layouts are
@itemize @minus
@item @b{usbjtag}
-The "USBJTAG-1" layout described in the original OpenOCD diploma thesis
+"USBJTAG-1" layout described in the original OpenOCD diploma thesis
@item @b{jtagkey}
Amontec JTAGkey and JTAGkey-tiny
@item @b{signalyzer}
@item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
-default values are used. This command is not available on Windows.
+default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
+@smallexample
+ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
+@end smallexample
@item @b{ft2232_latency} <@var{ms}>
On some systems using ft2232 based JTAG interfaces the FT_Read function call in
ft2232_read() fails to return the expected number of bytes. This can be caused by
@item @b{target_script} <@var{target#}> <@var{event}> <@var{script_file}>
@cindex target_script
-Event is either @option{reset}, @option{post_halt}, @option{pre_resume} or @option{gdb_program_config}
+Event is one of the following:
+@option{pre_reset}, @option{reset}, @option{post_reset}, @option{post_halt},
+@option{pre_resume} or @option{gdb_program_config}.
+@option{post_reset} and @option{reset} will produce the same results.
-TODO: describe exact semantic of events
@item @b{run_and_halt_time} <@var{target#}> <@var{time_in_ms}>
@cindex run_and_halt_time
The amount of time the debugger should wait after releasing reset before it asserts
Specifies a working area for the debugger to use. This may be used to speed-up
downloads to target memory and flash operations, or to perform otherwise unavailable
operations (some coprocessor operations on ARM7/9 systems, for example). The last
-parameter decides whether the memory should be preserved <@var{backup}>. If possible, use
-a working_area that doesn't need to be backed up, as that slows down operation.
+parameter decides whether the memory should be preserved (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If possible, use
+a working_area that doesn't need to be backed up, as performing a backup slows down operation.
@end itemize
@subsection arm7tdmi options
@cindex arm966e options
ARM966e options are similar to ARM9TDMI options.
+@subsection cortex_m3 options
+@cindex cortex_m3 options
+use variant <@var{variant}> @option{lm3s} when debugging luminary lm3s targets. This will cause
+openocd to use a software reset rather than asserting SRST to avoid a issue with clearing
+the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
+be detected and the normal reset behaviour used.
+
@subsection xscale options
@cindex xscale options
Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},
@cindex flash bank
Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
and <@var{bus_width}> bytes using the selected flash <driver>.
-
-@item @b{flash auto_erase} <@option{on}|@option{off}>
-@cindex flash auto_erase
-auto erase flash banks prior to writing. Currently only works when using
-@option{flash write_image} command. Default is @option{off}.
@end itemize
@subsection lpc2000 options
@b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
stm32x flash plugin only require the @var{target#}.
+@node Target library
+@chapter Target library
+@cindex Target library
+
+OpenOCD comes with a target configuration script library. These scripts can be
+used as-is or serve as a starting point.
+
+The target library is published together with the openocd executable and
+the path to the target library is in the OpenOCD script search path.
+Similarly there are example scripts for configuring the JTAG interface.
+
+The command line below uses the example parport configuration scripts
+that ship with OpenOCD, then configures the str710.cfg target and
+finally issues the init and reset command. The communication speed
+is set to 10kHz for reset and 8MHz for post reset.
+
+
+@smallexample
+openocd -f interface/parport.cfg -c "jtag_khz 10 8000" -f target/str710.cfg -c "init" -c "reset"
+@end smallexample
+
+
+To list the target scripts available:
+
+@smallexample
+$ ls /usr/local/lib/openocd/target
+
+arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
+at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
+at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
+at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
+@end smallexample
+
+
@node Commands
@chapter Commands
@cindex commands
-The Open On-Chip Debugger (OpenOCD) allows user interaction through a telnet interface
-(default: port 4444) and a GDB server (default: port 3333). The command line interpreter
+OpenOCD allows user interaction through a GDB server (default: port 3333),
+a telnet interface (default: port 4444), and a TCL interface (default: port 5555). The command line interpreter
is available from both the telnet interface and a GDB session. To issue commands to the
interpreter from within a GDB session, use the @option{monitor} command, e.g. use
@option{monitor poll} to issue the @option{poll} command. All output is relayed through the
GDB session.
+The TCL interface is used as a simplified RPC mechanism that feeds all the
+input into the TCL interpreter and returns the output from the evaluation of
+the commands.
+
@section Daemon
@itemize @bullet
@item @b{shutdown}
@cindex shutdown
-Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet).
+Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
@item @b{debug_level} [@var{n}]
@cindex debug_level
Display or adjust debug level to n<0-3>
+@item @b{fast} [@var{enable/disable}]
+@cindex fast
+Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
+downloads and fast memory access will work if the JTAG interface isn't too fast and
+the core doesn't run at a too low frequency. Note that this option only changes the default
+and that the indvidual options, like DCC memory downloads, can be enabled and disabled
+individually.
+
+The target specific "dangerous" optimisation tweaking options may come and go
+as more robust and user friendly ways are found to ensure maximum throughput
+and robustness with a minimum of configuration.
+
+Typically the "fast enable" is specified first on the command line:
+
+@smallexample
+openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
+@end smallexample
+
@item @b{log_output} <@var{file}>
@cindex log_output
Redirect logging to <file> (default: stderr)
@item @b{poll} [@option{on}|@option{off}]
@cindex poll
Poll the target for its current state. If the target is in debug mode, architecture
-specific information about the current state are printed. An optional parameter
+specific information about the current state is printed. An optional parameter
allows continuous polling to be enabled and disabled.
@item @b{halt} [@option{ms}]
@cindex halt
-Send a halt request to the target and waits for it to halt for [@option{ms}].
+Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
Default [@option{ms}] is 5 seconds if no arg given.
Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
-will stop openocd from waiting.
+will stop OpenOCD from waiting.
@item @b{wait_halt} [@option{ms}]
@cindex wait_halt
@item @b{resume} [@var{address}]
@cindex resume
Resume the target at its current code position, or at an optional address.
-Openocd will wait 5 seconds for the target to resume.
+OpenOCD will wait 5 seconds for the target to resume.
@item @b{step} [@var{address}]
@cindex step
@item @b{reset} [@option{run}|@option{halt}|@option{init}|@option{run_and_halt}
|@option{run_and_init}]
@cindex reset
-Do a hard-reset. The optional parameter specifies what should happen after the reset.
-This optional parameter overwrites the setting specified in the configuration file,
+Perform a hard-reset. The optional parameter specifies what should happen after the reset.
+This optional parameter overrides the setting specified in the configuration file,
making the new behaviour the default for the @option{reset} command.
@itemize @minus
@item @b{run}
@item @b{run_and_init}
@cindex reset run_and_init
Let the target run for a certain amount of time, then request a halt. Execute the
-reset script once the target entered debug mode.
+reset script once the target enters debug mode.
@end itemize
@end itemize
(binary) <@var{file}>.
@item @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
@cindex verify_image
-Verify <@var{file}> to target memory starting at <@var{address}>.
-This will first attempt using a crc checksum, if this fails it will try a binary compare.
+Verify <@var{file}> against target memory starting at <@var{address}>.
+This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
@end itemize
@subsection Flash commands
@item @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
@cindex flash erase_sector
Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
-<@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing might
+<@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
the CFI driver).
@item @b{flash erase_address} <@var{address}> <@var{length}>
@cindex flash erase_address
-Erase sectors starting at <@var{address}> for <@var{length}> number of bytes
+Erase sectors starting at <@var{address}> for <@var{length}> bytes
@item @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
@cindex flash write_bank
Write the binary <@var{file}> to flash bank <@var{num}>, starting at
<@option{offset}> bytes from the beginning of the bank.
-@item @b{flash write_image} <@var{file}> [@var{offset}] [@var{type}]
+@item @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
@cindex flash write_image
Write the image <@var{file}> to the current target's flash bank(s). A relocation
[@var{offset}] can be specified and the file [@var{type}] can be specified
explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
-(ELF file) or @option{s19} (Motorola s19).
+(ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
+if the @option{erase} parameter is given.
@item @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
@cindex flash protect
Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
-<@var{last}> of @option{flash bank} <@var{num}>.
-@item @b{flash auto_erase} <@var{on}|@var{off}>
-@cindex flash auto_erase
-Enable (@option{on}) to erase flash banks prior to writing using the flash @option{write_image} command
-only. Default is (@option{off}), flash banks have to be erased using @option{flash erase} command.
+<@var{last}> of @option{flash bank} <@var{num}>.
@end itemize
@page
controller handles erases automatically on a page (128/265 byte) basis so erase is
not necessary for flash programming. AT91SAM7 processors with less than 512K flash
only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
-that can be erased separatly.Only an EraseAll command is supported by the controller
+that can be erased separatly. Only an EraseAll command is supported by the controller
for each flash plane and this is called with
@itemize @bullet
@item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
mass erase flash memory.
@end itemize
+@subsection Stellaris specific commands
+@cindex Stellaris specific commands
+
+These are flash specific commands when using the Stellaris driver.
+@itemize @bullet
+@item @b{stellaris mass_erase} <@var{num}>
+@cindex stellaris mass_erase
+mass erase flash memory.
+@end itemize
+
@page
@section Architecture Specific Commands
@cindex Architecture Specific Commands
safe for all but ARM7TDMI--S cores (like Philips LPC).
@item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
@cindex arm7_9 fast_memory_access
-Allow the OpenOCD to read and write memory without checking completion of
+Allow OpenOCD to read and write memory without checking completion of
the operation. This provides a huge speed increase, especially with USB JTAG
cables (FT2232), but might be unsafe if used with targets running at a very low
speed, like the 32kHz startup clock of an AT91RM9200.
@section Debug commands
@cindex Debug commands
The following commands give direct access to the core, and are most likely
-only useful while debugging the OpenOCD.
+only useful while debugging OpenOCD.
@itemize @bullet
@item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
@cindex arm7_9 write_xpsr
@page
@section Target Requests
@cindex Target Requests
-Openocd can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
+OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
See libdcc in the contrib dir for more details.
@itemize @bullet
@item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
@chapter Sample Scripts
@cindex scripts
-This page will collect some script examples for different CPUs.
+This page shows how to use the target library.
The configuration script can be divided in the following section:
@itemize @bullet
@item flash configuration
@end itemize
-Detailed information about each section can be found at OpenOCD configuration
-
-@section OMAP5912 Flash Debug
-@cindex OMAP5912 Flash Debug
-The following two scripts were used with a wiggler PP and and a TI OMAP5912
-dual core processor - (@uref{http://www.ti.com}), on a OMAP5912 OSK board
-- (@uref{http://www.spectrumdigital.com}).
-@subsection Openocd config
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface parport
-parport_port 0x378
-parport_cable wiggler
-jtag_speed 0
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 38 0x0 0x0 0x0
-jtag_device 4 0x1 0x0 0xe
-jtag_device 8 0x0 0x0 0x0
-
-#target configuration
-daemon_startup reset
-
-#target <type> <endianness> <reset mode> <chainpos> <variant>
-target arm926ejs little run_and_init 1 arm926ejs
-target_script 0 reset omap5912_osk.init
-run_and_halt_time 0 30
-
-# omap5912 lcd frame buffer as working area
-working_area 0 0x20000000 0x3e800 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank cfi 0x00000000 0x1000000 2 2 0
-@end smallexample
-
-@subsection Openocd init
-@smallexample
-#
-# halt target
-#
-poll
-sleep 1
-halt
-wait_halt
-#
-# disable wdt
-#
-mww 0xfffec808 0x000000f5
-mww 0xfffec808 0x000000a0
-
-mww 0xfffeb048 0x0000aaaa
-sleep 500
-mww 0xfffeb048 0x00005555
-sleep 500
-#
-# detect flash
-#
-flash probe 0
-
-@end smallexample
-
-@section STR71x Script
-@cindex STR71x Script
-The following script was used with an Amontec JTAGkey and a STR710 / STR711 CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 0
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi
-run_and_halt_time 0 30
-
-working_area 0 0x2000C000 0x4000 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
-@end smallexample
-
-@section STR750 Script
-@cindex STR750 Script
-The following script was used with an Amontec JTAGkey and a STR750 CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 19
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-#reset_config trst_and_srst srst_pulls_trst
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#jtag nTRST and nSRST delay
-jtag_nsrst_delay 500
-jtag_ntrst_delay 500
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi
-run_and_halt_time 0 30
-
-working_area 0 0x40000000 0x4000 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str7x 0x20000000 0x000040000 0 0 0 STR75x
-@end smallexample
-
-@section STR912 Script
-@cindex STR912 Script
-The following script was used with an Amontec JTAGkey and a STR912 CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-jtag_speed 1
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 8 0x1 0x1 0xfe
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm966e <endianness> <reset mode> <chainpos> <variant>
-target arm966e little reset_halt 1 arm966e
-run_and_halt_time 0 30
-
-working_area 0 0x50000000 16384 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str9x 0x00000000 0x00080000 0 0 0
-@end smallexample
-
-@section STR912 comstick
-@cindex STR912 comstick Script
-The following script was used with a Hitex STR9 Comstick:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "STR9-comStick A"
-ft2232_layout comstick
-jtag_speed 1
-
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 8 0x1 0x1 0xfe
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm966e <endianness> <reset mode> <chainpos> <variant>
-target arm966e little reset_halt 1 arm966e
-run_and_halt_time 0 30
-
-working_area 0 0x50000000 16384 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str9x 0x00000000 0x00080000 0 0 0
-@end smallexample
-
-@section STM32x Script
-@cindex STM32x Script
-The following script was used with an Amontec JTAGkey and a STM32x CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-jtag_speed 10
-
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target cortex_m3 <endianness> <reset mode> <chainpos> <variant>
-target cortex_m3 little run_and_halt 0
-run_and_halt_time 0 30
-
-working_area 0 0x20000000 16384 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank stm32x 0x08000000 0x00020000 0 0 0
-@end smallexample
-
-@section STM32x Performance Stick
-@cindex STM32x Performance Stick Script
-The following script was used with the Hitex STM32 Performance Stick
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "STM32-PerformanceStick A"
-ft2232_layout stm32stick
-jtag_speed 10
-
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target cortex_m3 <endianness> <reset mode> <chainpos> <variant>
-target cortex_m3 little run_and_halt 0
-run_and_halt_time 0 30
-
-working_area 0 0x20000000 16384 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank stm32x 0x08000000 0x00020000 0 0 0
-@end smallexample
-
-@section LPC2129 Script
-@cindex LPC2129 Script
-The following script was used with an wiggler PP and a LPC-2129 CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface parport
-parport_port 0x378
-parport_cable wiggler
-jtag_speed 0
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
-run_and_halt_time 0 30
-
-working_area 0 0x40000000 0x4000 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
-@end smallexample
-
-@section LPC2148 Script
-@cindex LPC2148 Script
-The following script was used with an Amontec JTAGkey and a LPC2148 CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 3
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
-run_and_halt_time 0 30
-
-working_area 0 0x40000000 0x8000 nobackup
-
-#flash configuration
-flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v1 14765 calc_checksum
-@end smallexample
-
-@section LPC2294 Script
-@cindex LPC2294 Script
-The following script was used with an Amontec JTAGkey and a LPC2294 CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 3
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
-run_and_halt_time 0 30
-
-working_area 0 0x40000000 0x4000 nobackup
-
-#flash configuration
-flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
-@end smallexample
+Detailed information about each section can be found at OpenOCD configuration.
-@section AT91R40008 Script
-@cindex AT91R40008 Script
-The following script was used with an Amontec JTAGkey and a AT91R40008 CPU:
+@section AT91R40008 example
+@cindex AT91R40008 example
+To start OpenOCD with a target script for the AT91R40008 CPU and reset
+the CPU upon startup of the OpenOCD daemon.
@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 0
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi
-run_and_halt_time 0 30
-@end smallexample
-
-@section AT91SAM7s Script
-@cindex AT91SAM7s Script
-The following script was used with an Olimex ARM-JTAG-OCD and a AT91SAM7S64 CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Olimex OpenOCD JTAG A"
-ft2232_layout olimex-jtag
-ft2232_vid_pid 0x15BA 0x0003
-jtag_speed 0
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi
-run_and_halt_time 0 30
-
-# flash-options AT91
-working_area 0 0x00200000 0x4000 nobackup
-flash bank at91sam7 0 0 0 0 0
-
-# Information:
-# erase command (telnet-interface) for complete flash:
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15
-# set/clear NVM-Bits:
-# at91sam7 gpnvm <num> <bit> <set|clear>
-# disable locking from SAM-BA:
-# flash protect 0 0 1 off
-@end smallexample
-
-@section XSCALE IXP42x Script
-@cindex XSCALE IXP42x Script
-The following script was used with an Amontec JTAGkey-Tiny and a xscale ixp42x CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 0
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 7 0x1 0x7f 0x7e
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
-target xscale big run_and_halt 0 IXP42x
-run_and_halt_time 0 30
+openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
@end smallexample
-@section Cirrus Logic EP9301 Script
-@cindex Cirrus Logic EP9301 Script
-The following script was used with FT2232 based JTAG interfaces and a
-Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-#Olimex ARM-USB-OCD
-#ft2232_device_desc "Olimex OpenOCD JTAG"
-#ft2232_layout olimex-jtag
-#ft2232_vid_pid 0x15ba 0x0003
-
-#Amontec JTAGkey (and JTAGkey-Tiny)
-#Serial is only necessary if more than one JTAGkey is connected
-ft2232_device_desc "Amontec JTAGkey A"
-#ft2232_serial AMTJKV31
-#ft2232_serial T1P3S2W8
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-
-#wiggler/parallel port interface
-#interface parport
-#parport_port 0x378
-#parport_cable wiggler
-#jtag_speed 0
-jtag_speed 1
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#target configuration
-daemon_startup attach
-
-#target <type> <endianess> <reset mode>
-target arm920t little reset_halt 0
-working_area 0 0x80014000 0x1000 backup
-
-#flash configuration
-#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
-flash bank cfi 0x60000000 0x1000000 2 2 0
-@end smallexample
-
-@section Hilscher netX 100 / 500 Script
-@cindex Hilscher netX 100 / 500 Script
-The following script was used with an Amontec JTAGkey and a Hilscher
-netX 500 CPU:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 5
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#target configuration
-daemon_startup reset
-
-#target <type> <endianness> <startup mode> <chainpos> <variant>
-target arm926ejs little run_and_halt 0 arm926ejs
-run_and_halt_time 0 500
-@end smallexample
-
-@section Marvell/Intel PXA270 Script
-@cindex Marvell/Intel PXA270 Script
-@smallexample
-# config for Intel PXA270
-# not, as of 2007-06-22, openocd only works with the
-# libftd2xx library from ftdi. libftdi does not work.
-
-telnet_port 3333
-gdb_port 4444
-
-interface ft2232
-ft2232_layout olimex-jtag
-ft2232_vid_pid 0x15BA 0x0003
-ft2232_device_desc "Olimex OpenOCD JTAG"
-jtag_speed 0
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
-# the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 260
-# set the jtag_ntrst_delay to the delay introduced by a reset circuit
-# the rest of the needed delays are built into the openocd program
-jtag_ntrst_delay 0
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst separate
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 7 0x1 0x7f 0x7e
-
-#target configuration
-daemon_startup reset
-
-target xscale little reset_halt 0 pxa27x
-
-# maps to PXA internal RAM. If you are using a PXA255
-# you must initialize SDRAM or leave this option off
-working_area 0 0x5c000000 0x10000 nobackup
-
-run_and_halt_time 0 30
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-# works for P30 flash
-flash bank cfi 0x00000000 0x1000000 2 4 0
-@end smallexample
-
-@node GDB and Openocd
-@chapter GDB and Openocd
-@cindex GDB and Openocd
-Openocd complies with the remote gdbserver protocol, and as such can be used
+@node GDB and OpenOCD
+@chapter GDB and OpenOCD
+@cindex GDB and OpenOCD
+OpenOCD complies with the remote gdbserver protocol, and as such can be used
to debug remote targets.
@section Connecting to gdb
@end smallexample
This would cause gdb to connect to the gdbserver on the local pc using port 3333.
-To see a list of available openocd commands type @option{monitor help} on the
+To see a list of available OpenOCD commands type @option{monitor help} on the
gdb commandline.
-Openocd supports the gdb @option{qSupported} packet, this enables information
+OpenOCD supports the gdb @option{qSupported} packet, this enables information
to be sent by the gdb server (openocd) to gdb. Typical information includes
packet size and device memory map.
-Previous versions of openocd required the following gdb options to increase
+Previous versions of OpenOCD required the following gdb options to increase
the packet size and speed up gdb communication.
@smallexample
set remote memory-write-packet-size 1024
@section Programming using gdb
@cindex Programming using gdb
-By default the target memory map is not sent to gdb, this can be enabled by
-the following openocd config option:
+By default the target memory map is sent to gdb, this can be disabled by
+the following OpenOCD config option:
@smallexample
-gdb_memory_map enable
+gdb_memory_map disable
@end smallexample
For this to function correctly a valid flash config must also be configured
-in openocd. For speed also configure a valid working area.
+in OpenOCD. For faster performance you should also configure a valid
+working area.
Informing gdb of the memory map of the target will enable gdb to protect any
flash area of the target and use hardware breakpoints by default. This means
-that the openocd option @option{arm7_9 force_hw_bkpts} is not required when
+that the OpenOCD option @option{arm7_9 force_hw_bkpts} is not required when
using a memory map.
To view the configured memory map in gdb, use the gdb command @option{info mem}
areas to be programmed lie within the target flash area the vFlash packets
will be used.
-Incase the target needs configuring before gdb programming, a script can be executed.
+If the target needs configuring before gdb programming, a script can be executed.
@smallexample
target_script 0 gdb_program_config config.script
@end smallexample
To verify any flash programming the gdb command @option{compare-sections}
can be used.
+@node TCL and OpenOCD
+@chapter TCL and OpenOCD
+@cindex TCL and OpenOCD
+OpenOCD embeds a TCL interpreter (see JIM) for command parsing and scripting
+support.
+
+The TCL interpreter can be invoked from the interactive command line, files, and a network port.
+
+The command and file interfaces are fairly straightforward, while the network
+port is geared toward intergration with external clients. A small example
+of an external TCL script that can connect to openocd is shown below.
+
+@verbatim
+# Simple tcl client to connect to openocd
+puts "Use empty line to exit"
+set fo [socket 127.0.0.1 6666]
+puts -nonewline stdout "> "
+flush stdout
+while {[gets stdin line] >= 0} {
+ if {$line eq {}} break
+ puts $fo $line
+ flush $fo
+ gets $fo line
+ puts $line
+ puts -nonewline stdout "> "
+ flush stdout
+}
+close $fo
+@end verbatim
+
+This script can easily be modified to front various GUIs or be a sub
+component of a larger framework for control and interaction.
+
@node Upgrading
@chapter Deprecated/Removed Commands
@cindex Deprecated/Removed Commands
-Certain openocd commands have been deprecated/removed during the various revisions.
+Certain OpenOCD commands have been deprecated/removed during the various revisions.
@itemize @bullet
@item @b{load_binary}
@item @b{arm7_9 fast_writes}
@cindex arm7_9 fast_writes
use @option{arm7_9 fast_memory_access} command with same args
+@item @b{flash auto_erase}
+@cindex flash auto_erase
+use @option{flash write_image} command passing @option{erase} as the first parameter.
@end itemize
@node FAQ
Make sure you have Cygwin installed, or at least a version of OpenOCD that
claims to come with all the necessary dlls. When using Cygwin, try launching
-the OpenOCD from the Cygwin shell.
+OpenOCD from the Cygwin shell.
@item I'm trying to set a breakpoint using GDB (or a frontend like Insight or
Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
Make sure your PC's parallel port operates in EPP mode. You might have to try several
settings in your PC BIOS (ECP, EPP, and different versions of those).
-@item When debugging with the OpenOCD and GDB (plain GDB, Insight, or Eclipse),
+@item When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
memory read caused data abort".
This warning doesn't indicate any serious problem, as long as you don't want to
debug your core right out of reset. Your .cfg file specified @option{jtag_reset
-trst_and_srst srst_pulls_trst} to tell the OpenOCD that either your board,
+trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
independently. With this setup, it's not possible to halt the core right out of
reset, everything else should work fine.
Code Review / openocd.git / blobdiff