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flash/nor/at91sam4: add SAM4E16 support
[openocd.git] / src / flash / nor / at91sam4.c
diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 1ba39109efcd7cac3a10677ad95fa8d8aaf3bd7a..8e873a6c7e76254796f0928c1e6533ae24688dea 100644 (file)
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -67,7 +67,7 @@
 
 #define REG_NAME_WIDTH  (12)
 
-/* at91sam4s series (has always one flash bank)*/
+/* at91sam4s/at91sam4e series (has always one flash bank)*/
 #define FLASH_BANK_BASE_S   0x00400000
 
 /* at91sam4sd series (two one flash banks), first bank address */
@@ -260,6 +260,42 @@ static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
 
 /* these are used to *initialize* the "pChip->details" structure. */
 static const struct sam4_chip_details all_sam4_details[] = {
+
+       /* Start at91sam4e* series */
+       /*atsam4e16e - LQFP144/LFBGA144*/
+       {
+               .chipid_cidr    = 0xA3CC0CE0,
+               .name           = "at91sam4e16e",
+               .total_flash_size     = 1024 * 1024,
+               .total_sram_size      = 128 * 1024,
+               .n_gpnvms       = 2,
+               .n_banks        = 1,
+               {
+/*             .bank[0] = {*/
+                 {
+                       .probed = 0,
+                       .pChip  = NULL,
+                       .pBank  = NULL,
+                       .bank_number = 0,
+                       .base_address = FLASH_BANK_BASE_S,
+                       .controller_address = 0x400e0a00,
+                       .flash_wait_states = 6, /* workaround silicon bug */
+                       .present = 1,
+                       .size_bytes =  1024 * 1024,
+                       .nsectors   =  128,
+                       .sector_size = 8192,
+                       .page_size   = 512,
+                 },
+/*             .bank[1] = {*/
+                 {
+                       .present = 0,
+                       .probed = 0,
+                       .bank_number = 1,
+
+                 },
+               },
+       },
+
        /* Start at91sam4s* series */
        /*atsam4s16c - LQFP100/BGA100*/
        {
@@ -504,6 +540,41 @@ static const struct sam4_chip_details all_sam4_details[] = {
                },
        },
 
+       /* at91samg53n19 */
+       {
+               .chipid_cidr    = 0x247e0ae0,
+               .name           = "at91samg53n19",
+               .total_flash_size     = 512 * 1024,
+               .total_sram_size      = 96 * 1024,
+               .n_gpnvms       = 2,
+               .n_banks        = 1,
+
+/*             .bank[0] = {*/
+               {
+                       {
+                               .probed = 0,
+                               .pChip  = NULL,
+                               .pBank  = NULL,
+                               .bank_number = 0,
+                               .base_address = FLASH_BANK_BASE_S,
+                               .controller_address = 0x400e0a00,
+                               .flash_wait_states = 6, /* workaround silicon bug */
+                               .present = 1,
+                               .size_bytes =  512 * 1024,
+                               .nsectors   =  64,
+                               .sector_size = 8192,
+                               .page_size   = 512,
+                       },
+/*             .bank[1] = {*/
+                 {
+                       .present = 0,
+                       .probed = 0,
+                       .bank_number = 1,
+
+                 },
+               }
+       },
+
        /* terminate */
        {
                .chipid_cidr    = 0,
@@ -1002,7 +1073,7 @@ static uint32_t sam4_reg_fieldname(struct sam4_chip *pChip,
        }
 
        /* show the basics */
-       LOG_USER_N("\t%*s: %*d [0x%0*x] ",
+       LOG_USER_N("\t%*s: %*" PRId32 " [0x%0*" PRIx32 "] ",
                REG_NAME_WIDTH, regname,
                dwidth, v,
                hwidth, v);
@@ -1076,8 +1147,13 @@ static const struct archnames { unsigned value; const char *name; } archnames[]
        { 0x37,  "CAP7 Series"                                                          },
        { 0x39,  "CAP9 Series"                                                          },
        { 0x3B,  "CAP11 Series"                                                         },
+       { 0x3C, "ATSAM4E"                                                               },
        { 0x40,  "AT91x40 Series"                                                       },
        { 0x42,  "AT91x42 Series"                                                       },
+       { 0x43,  "SAMG51 Series"
+       },
+       { 0x47,  "SAMG53 Series"
+       },
        { 0x55,  "AT91x55 Series"                                                       },
        { 0x60,  "AT91SAM7Axx Series"                                           },
        { 0x61,  "AT91SAM7AQxx Series"                                          },
@@ -1227,10 +1303,10 @@ static void sam4_explain_ckgr_mcfr(struct sam4_chip *pChip)
        v = (v * pChip->cfg.slow_freq) / 16;
        pChip->cfg.mainosc_freq = v;
 
-       LOG_USER("(%3.03f Mhz (%d.%03dkhz slowclk)",
+       LOG_USER("(%3.03f Mhz (%" PRIu32 ".%03" PRIu32 "khz slowclk)",
                _tomhz(v),
-               pChip->cfg.slow_freq / 1000,
-               pChip->cfg.slow_freq % 1000);
+               (uint32_t)(pChip->cfg.slow_freq / 1000),
+               (uint32_t)(pChip->cfg.slow_freq % 1000));
 }
 
 static void sam4_explain_ckgr_plla(struct sam4_chip *pChip)
@@ -1246,8 +1322,8 @@ static void sam4_explain_ckgr_plla(struct sam4_chip *pChip)
                LOG_USER("\tPLLA Freq: (Disabled,mula = 0)");
        else if (diva == 0)
                LOG_USER("\tPLLA Freq: (Disabled,diva = 0)");
-       else if (diva == 1) {
-               pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1));
+       else if (diva >= 1) {
+               pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1) / diva);
                LOG_USER("\tPLLA Freq: %3.03f MHz",
                        _tomhz(pChip->cfg.plla_freq));
        }
@@ -1398,7 +1474,7 @@ static const struct sam4_reg_list sam4_all_regs[] = {
 
 static struct sam4_bank_private *get_sam4_bank_private(struct flash_bank *bank)
 {
-       return (struct sam4_bank_private *)(bank->driver_priv);
+       return bank->driver_priv;
 }
 
 /**
@@ -1479,7 +1555,7 @@ static int sam4_GetInfo(struct sam4_chip *pChip)
                /* display all regs */
                LOG_DEBUG("Start: %s", pReg->name);
                regval = *sam4_get_reg_ptr(&(pChip->cfg), pReg);
-               LOG_USER("%*s: [0x%08x] -> 0x%08x",
+               LOG_USER("%*s: [0x%08" PRIx32 "] -> 0x%08" PRIx32,
                        REG_NAME_WIDTH,
                        pReg->name,
                        pReg->address,
@@ -1495,7 +1571,7 @@ static int sam4_GetInfo(struct sam4_chip *pChip)
        LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq));
        LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq));
 
-       LOG_USER(" UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x",
+       LOG_USER(" UniqueId: 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08"PRIx32,
                pChip->cfg.unique_id[0],
                pChip->cfg.unique_id[1],
                pChip->cfg.unique_id[2],
@@ -1619,7 +1695,7 @@ static int sam4_GetDetails(struct sam4_bank_private *pPrivate)
                LOG_ERROR("SAM4 ChipID 0x%08x not found in table (perhaps you can ID this chip?)",
                        (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR));
                /* Help the victim, print details about the chip */
-               LOG_INFO("SAM4 CHIPID_CIDR: 0x%08x decodes as follows",
+               LOG_INFO("SAM4 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows",
                        pPrivate->pChip->cfg.CHIPID_CIDR);
                sam4_explain_chipid_cidr(pPrivate->pChip);
                return ERROR_FAIL;
@@ -1819,16 +1895,6 @@ static int sam4_protect(struct flash_bank *bank, int set, int first, int last)
 
 }
 
-static int sam4_info(struct flash_bank *bank, char *buf, int buf_size)
-{
-       if (bank->target->state != TARGET_HALTED) {
-               LOG_ERROR("Target not halted");
-               return ERROR_TARGET_NOT_HALTED;
-       }
-       buf[0] = 0;
-       return ERROR_OK;
-}
-
 static int sam4_page_read(struct sam4_bank_private *pPrivate, unsigned pagenum, uint8_t *buf)
 {
        uint32_t adr;
@@ -1848,94 +1914,7 @@ static int sam4_page_read(struct sam4_bank_private *pPrivate, unsigned pagenum,
        return r;
 }
 
-/* The code below is basically this: */
-/* compiled with */
-/* arm-none-eabi-gcc -mthumb -mcpu = cortex-m3 -O9 -S ./foobar.c -o foobar.s */
-/*  */
-/* Only the *CPU* can write to the flash buffer. */
-/* the DAP cannot... so - we download this 28byte thing */
-/* Run the algorithm - (below) */
-/* to program the device */
-/*  */
-/* ======================================== */
-/* #include <stdint.h> */
-/*  */
-/* struct foo { */
-/*   uint32_t *dst; */
-/*   const uint32_t *src; */
-/*   int   n; */
-/*   volatile uint32_t *base; */
-/*   uint32_t   cmd; */
-/* }; */
-/*  */
-/*  */
-/* uint32_t sam4_function(struct foo *p) */
-/* { */
-/*   volatile uint32_t *v; */
-/*   uint32_t *d; */
-/*   const uint32_t *s; */
-/*   int   n; */
-/*   uint32_t r; */
-/*  */
-/*   d = p->dst; */
-/*   s = p->src; */
-/*   n = p->n; */
-/*  */
-/*   do { */
-/*     *d++ = *s++; */
-/*   } while (--n) */
-/*     ; */
-/*  */
-/*   v = p->base; */
-/*  */
-/*   v[ 1 ] = p->cmd; */
-/*   do { */
-/*     r = v[8/4]; */
-/*   } while (!(r&1)) */
-/*     ; */
-/*   return r; */
-/* } */
-/* ======================================== */
-
-static const uint8_t
-       sam4_page_write_opcodes[] = {
-       /*  24 0000 0446                mov     r4, r0 */
-       0x04, 0x46,
-       /*  25 0002 6168                ldr     r1, [r4, #4] */
-       0x61, 0x68,
-       /*  26 0004 0068                ldr     r0, [r0, #0] */
-       0x00, 0x68,
-       /*  27 0006 A268                ldr     r2, [r4, #8] */
-       0xa2, 0x68,
-       /*  28                          @ lr needed for prologue */
-       /*  29                  .L2: */
-       /*  30 0008 51F8043B            ldr     r3, [r1], #4 */
-       0x51, 0xf8, 0x04, 0x3b,
-       /*  31 000c 12F1FF32            adds    r2, r2, #-1 */
-       0x12, 0xf1, 0xff, 0x32,
-       /*  32 0010 40F8043B            str     r3, [r0], #4 */
-       0x40, 0xf8, 0x04, 0x3b,
-       /*  33 0014 F8D1                bne     .L2 */
-       0xf8, 0xd1,
-       /*  34 0016 E268                ldr     r2, [r4, #12] */
-       0xe2, 0x68,
-       /*  35 0018 2369                ldr     r3, [r4, #16] */
-       0x23, 0x69,
-       /*  36 001a 5360                str     r3, [r2, #4] */
-       0x53, 0x60,
-       /*  37 001c 0832                adds    r2, r2, #8 */
-       0x08, 0x32,
-       /*  38                  .L4: */
-       /*  39 001e 1068                ldr     r0, [r2, #0] */
-       0x10, 0x68,
-       /*  40 0020 10F0010F            tst     r0, #1 */
-       0x10, 0xf0, 0x01, 0x0f,
-       /*  41 0024 FBD0                beq     .L4 */
-       0xfb, 0xd0,
-       0x00, 0xBE                              /* bkpt #0 */
-};
-
-static int sam4_page_write(struct sam4_bank_private *pPrivate, unsigned pagenum, uint8_t *buf)
+static int sam4_page_write(struct sam4_bank_private *pPrivate, unsigned pagenum, const uint8_t *buf)
 {
        uint32_t adr;
        uint32_t status;
@@ -1997,7 +1976,7 @@ static int sam4_page_write(struct sam4_bank_private *pPrivate, unsigned pagenum,
 }
 
 static int sam4_write(struct flash_bank *bank,
-       uint8_t *buffer,
+       const uint8_t *buffer,
        uint32_t offset,
        uint32_t count)
 {
@@ -2376,5 +2355,4 @@ struct flash_driver at91sam4_flash = {
        .auto_probe = sam4_auto_probe,
        .erase_check = default_flash_blank_check,
        .protect_check = sam4_protect_check,
-       .info = sam4_info,
 };
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