#define SAM4L_NUM_SECTORS 16
/* Locations in memory map */
-#define SAM4L_FLASH 0x00000000 /* Flash region */
+#define SAM4L_FLASH ((uint32_t)0x00000000) /* Flash region */
#define SAM4L_FLASH_USER 0x00800000 /* Flash user page region */
#define SAM4L_FLASHCALW 0x400A0000 /* Flash controller */
#define SAM4L_CHIPID 0x400E0740 /* Chip Identification */
/* Issue a quick page read to verify that we've erased this page */
res = sam4l_flash_command(bank->target, SAM4L_FCMD_QPR, pn);
if (res != ERROR_OK) {
- LOG_ERROR("Quick page read %d failed", pn);
+ LOG_ERROR("Quick page read %" PRIu32 " failed", pn);
return res;
}
chip->flash_kb = 512;
break;
default:
- LOG_ERROR("Unknown flash size (chip ID is %08X), assuming 128K", id);
+ LOG_ERROR("Unknown flash size (chip ID is %08" PRIx32 "), assuming 128K", id);
chip->flash_kb = 128;
break;
}
/* Done */
chip->probed = true;
- LOG_INFO("SAM4L MCU: %s (Rev %c) (%uKB Flash with %d %dB pages, %uKB RAM)",
- chip->details ? chip->details->name : "unknown", 'A' + (id & 0xF),
+ LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRId32 "B pages, %" PRIu32 "KB RAM)",
+ chip->details ? chip->details->name : "unknown", (char)('A' + (id & 0xF)),
chip->flash_kb, chip->num_pages, chip->page_size, chip->ram_kb);
return ERROR_OK;
/* Write an entire page from host buffer 'buf' to page-aligned 'address' in the
* Flash. */
static int sam4l_write_page(struct sam4l_info *chip, struct target *target,
- uint32_t address, uint8_t *buf)
+ uint32_t address, const uint8_t *buf)
{
int res;
+ LOG_DEBUG("sam4l_write_page address=%08" PRIx32, address);
+
/* Clear the page buffer before we write to it */
res = sam4l_flash_command(target, SAM4L_FCMD_CPB, -1);
if (res != ERROR_OK) {
/* Write partial contents into page-aligned 'address' on the Flash from host
* buffer 'buf' by writing 'nb' of 'buf' at 'offset' into the Flash page. */
static int sam4l_write_page_partial(struct sam4l_info *chip,
- struct flash_bank *bank, uint32_t address, uint8_t *buf,
+ struct flash_bank *bank, uint32_t address, const uint8_t *buf,
uint32_t page_offset, uint32_t nb)
{
int res;
if (!pg)
return ERROR_FAIL;
+ LOG_DEBUG("sam4l_write_page_partial address=%08" PRIx32 " nb=%08" PRIx32, address, nb);
+
assert(page_offset + nb < chip->page_size);
assert((address % chip->page_size) == 0);
return res;
}
-static int sam4l_write(struct flash_bank *bank, uint8_t *buffer,
+static int sam4l_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
int res;
uint32_t nb = 0;
struct sam4l_info *chip = (struct sam4l_info *)bank->driver_priv;
+ LOG_DEBUG("sam4l_write offset=%08" PRIx32 " count=%08" PRIx32, offset, count);
+
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
for (int i = 0; i < np; i++) {
if (count >= chip->page_size) {
res = sam4l_write_page(chip, bank->target,
- bank->base + (i * chip->page_size),
+ bank->base + offset,
buffer + (i * chip->page_size));
/* Advance one page */
offset += chip->page_size;
count -= chip->page_size;
} else {
res = sam4l_write_page_partial(chip, bank,
- bank->base + (i * chip->page_size),
+ bank->base + offset,
buffer + (i * chip->page_size), 0, count);
/* We're done after this. */
offset += count;