#define SAMD_GET_DEVSEL(id) (id & 0xFF)
/* Bits to mask out lockbits in user row */
-#define NVMUSERROW_LOCKBIT_MASK ((uint64_t)0x0000FFFFFFFFFFFF)
+#define NVMUSERROW_LOCKBIT_MASK 0x0000FFFFFFFFFFFFULL
struct samd_part {
uint8_t id;
static const struct samd_family samd_families[] = {
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_20,
samd20_parts, ARRAY_SIZE(samd20_parts),
- (uint64_t)0xFFFF01FFFE01FF77 },
+ 0xFFFF01FFFE01FF77ULL },
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_21,
samd21_parts, ARRAY_SIZE(samd21_parts),
- (uint64_t)0xFFFF01FFFE01FF77 },
+ 0xFFFF01FFFE01FF77ULL },
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_09,
samd09_parts, ARRAY_SIZE(samd09_parts),
- (uint64_t)0xFFFF01FFFE01FF77 },
+ 0xFFFF01FFFE01FF77ULL },
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_10,
samd10_parts, ARRAY_SIZE(samd10_parts),
- (uint64_t)0xFFFF01FFFE01FF77 },
+ 0xFFFF01FFFE01FF77ULL },
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_11,
samd11_parts, ARRAY_SIZE(samd11_parts),
- (uint64_t)0xFFFF01FFFE01FF77 },
+ 0xFFFF01FFFE01FF77ULL },
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_L, SAMD_SERIES_21,
saml21_parts, ARRAY_SIZE(saml21_parts),
- (uint64_t)0xFFFF03FFFC01FF77 },
+ 0xFFFF03FFFC01FF77ULL },
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_L, SAMD_SERIES_22,
saml22_parts, ARRAY_SIZE(saml22_parts),
- (uint64_t)0xFFFF03FFFC01FF77 },
+ 0xFFFF03FFFC01FF77ULL },
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_C, SAMD_SERIES_20,
samc20_parts, ARRAY_SIZE(samc20_parts),
- (uint64_t)0xFFFF03FFFC01FF77 },
+ 0xFFFF03FFFC01FF77ULL },
{ SAMD_PROCESSOR_M0, SAMD_FAMILY_C, SAMD_SERIES_21,
samc21_parts, ARRAY_SIZE(samc21_parts),
- (uint64_t)0xFFFF03FFFC01FF77 },
+ 0xFFFF03FFFC01FF77ULL },
};
struct samd_info {