};
struct ath79_flash_bank {
- int probed;
+ bool probed;
int chipselect;
uint32_t io_base;
const struct flash_device *dev;
const uint32_t preamble1[] = {
/* $15 = MIPS32_PRACC_BASE_ADDR */
- MIPS32_LUI(15, PRACC_UPPER_BASE_ADDR),
+ MIPS32_LUI(0, 15, PRACC_UPPER_BASE_ADDR),
/* $1 = io_base */
- MIPS32_LUI(1, UPPER16(io_base)),
+ MIPS32_LUI(0, 1, UPPER16(io_base)),
};
ath79_pracc_addn(ctx, preamble1, ARRAY_SIZE(preamble1));
if (ath79_info->spi.pre_deselect) {
ath79_info->spi.pre_deselect = 0;
const uint32_t pre_deselect[] = {
/* [$1 + FS] = 1 (enable flash io register access) */
- MIPS32_LUI(2, UPPER16(1)),
- MIPS32_ORI(2, 2, LOWER16(1)),
- MIPS32_SW(2, ATH79_REG_FS, 1),
+ MIPS32_LUI(0, 2, UPPER16(1)),
+ MIPS32_ORI(0, 2, 2, LOWER16(1)),
+ MIPS32_SW(0, 2, ATH79_REG_FS, 1),
/* deselect flash just in case */
/* $2 = SPI_CS_DIS */
- MIPS32_LUI(2, UPPER16(cs_high)),
- MIPS32_ORI(2, 2, LOWER16(cs_high)),
+ MIPS32_LUI(0, 2, UPPER16(cs_high)),
+ MIPS32_ORI(0, 2, 2, LOWER16(cs_high)),
/* [$1 + WRITE] = $2 */
- MIPS32_SW(2, ATH79_REG_WRITE, 1),
+ MIPS32_SW(0, 2, ATH79_REG_WRITE, 1),
};
ath79_pracc_addn(ctx, pre_deselect, ARRAY_SIZE(pre_deselect));
}
const uint32_t preamble2[] = {
/* t0 = CLOCK_LOW + 0-bit */
- MIPS32_LUI(8, UPPER16((clock_low + 0))),
- MIPS32_ORI(8, 8, LOWER16((clock_low + 0))),
+ MIPS32_LUI(0, 8, UPPER16((clock_low + 0))),
+ MIPS32_ORI(0, 8, 8, LOWER16((clock_low + 0))),
/* t1 = CLOCK_LOW + 1-bit */
- MIPS32_LUI(9, UPPER16((clock_low + 1))),
- MIPS32_ORI(9, 9, LOWER16((clock_low + 1))),
+ MIPS32_LUI(0, 9, UPPER16((clock_low + 1))),
+ MIPS32_ORI(0, 9, 9, LOWER16((clock_low + 1))),
/* t2 = CLOCK_HIGH + 0-bit */
- MIPS32_LUI(10, UPPER16((clock_high + 0))),
- MIPS32_ORI(10, 10, LOWER16((clock_high + 0))),
+ MIPS32_LUI(0, 10, UPPER16((clock_high + 0))),
+ MIPS32_ORI(0, 10, 10, LOWER16((clock_high + 0))),
/* t3 = CLOCK_HIGH + 1-bit */
- MIPS32_LUI(11, UPPER16((clock_high + 1))),
- MIPS32_ORI(11, 11, LOWER16((clock_high + 1))),
+ MIPS32_LUI(0, 11, UPPER16((clock_high + 1))),
+ MIPS32_ORI(0, 11, 11, LOWER16((clock_high + 1))),
};
ath79_pracc_addn(ctx, preamble2, ARRAY_SIZE(preamble2));
if (bit) {
/* [$1 + WRITE] = t1 */
pracc_add(ctx, 0,
- MIPS32_SW(9, ATH79_REG_WRITE, 1));
+ MIPS32_SW(0, 9, ATH79_REG_WRITE, 1));
/* [$1 + WRITE] = t3 */
pracc_add(ctx, 0,
- MIPS32_SW(11, ATH79_REG_WRITE, 1));
+ MIPS32_SW(0, 11, ATH79_REG_WRITE, 1));
} else {
/* [$1 + WRITE] = t0 */
pracc_add(ctx, 0,
- MIPS32_SW(8, ATH79_REG_WRITE, 1));
+ MIPS32_SW(0, 8, ATH79_REG_WRITE, 1));
/* [$1 + WRITE] = t2 */
pracc_add(ctx, 0,
- MIPS32_SW(10, ATH79_REG_WRITE, 1));
+ MIPS32_SW(0, 10, ATH79_REG_WRITE, 1));
}
}
if (i % 4 == 3) {
/* $3 = [$1 + DATA] */
- pracc_add(ctx, 0, MIPS32_LW(3, ATH79_REG_DATA, 1));
+ pracc_add(ctx, 0, MIPS32_LW(0, 3, ATH79_REG_DATA, 1));
/* [OUTi] = $3 */
pracc_add(ctx, MIPS32_PRACC_PARAM_OUT + pracc_out,
- MIPS32_SW(3, PRACC_OUT_OFFSET +
+ MIPS32_SW(0, 3, PRACC_OUT_OFFSET +
pracc_out, 15));
pracc_out += 4;
}
}
if (len & 3) { /* not a multiple of 4 bytes */
/* $3 = [$1 + DATA] */
- pracc_add(ctx, 0, MIPS32_LW(3, ATH79_REG_DATA, 1));
+ pracc_add(ctx, 0, MIPS32_LW(0, 3, ATH79_REG_DATA, 1));
/* [OUTi] = $3 */
pracc_add(ctx, MIPS32_PRACC_PARAM_OUT + pracc_out,
- MIPS32_SW(3, PRACC_OUT_OFFSET + pracc_out, 15));
+ MIPS32_SW(0, 3, PRACC_OUT_OFFSET + pracc_out, 15));
pracc_out += 4;
}
if (ath79_info->spi.post_deselect && !partial_xfer) {
const uint32_t post_deselect[] = {
/* $2 = SPI_CS_DIS */
- MIPS32_LUI(2, UPPER16(cs_high)),
- MIPS32_ORI(2, 2, LOWER16(cs_high)),
+ MIPS32_LUI(0, 2, UPPER16(cs_high)),
+ MIPS32_ORI(0, 2, 2, LOWER16(cs_high)),
/* [$1 + WRITE] = $2 */
- MIPS32_SW(2, ATH79_REG_WRITE, 1),
+ MIPS32_SW(0, 2, ATH79_REG_WRITE, 1),
/* [$1 + FS] = 0 (disable flash io register access) */
- MIPS32_XORI(2, 2, 0),
- MIPS32_SW(2, ATH79_REG_FS, 1),
+ MIPS32_XORI(0, 2, 2, 0),
+ MIPS32_SW(0, 2, ATH79_REG_FS, 1),
};
ath79_pracc_addn(ctx, post_deselect, ARRAY_SIZE(post_deselect));
}
/* common pracc epilogue */
/* jump to start */
- pracc_add(ctx, 0, MIPS32_B(NEG16(ctx->code_count + 1)));
+ pracc_add(ctx, 0, MIPS32_B(0, NEG16(ctx->code_count + 1)));
/* restore $15 from DeSave */
- pracc_add(ctx, 0, MIPS32_MFC0(15, 31, 0));
+ pracc_add(ctx, 0, MIPS32_MFC0(0, 15, 31, 0));
return pracc_out / 4;
}
const int pracc_loop_byte = 8 * 2 + 2;
struct pracc_queue_info ctx = {
- .max_code = PRACC_MAX_INSTRUCTIONS
+ .ejtag_info = ejtag_info
};
- int max_len = (ctx.max_code - pracc_pre_post) / pracc_loop_byte;
+ int max_len = (PRACC_MAX_INSTRUCTIONS - pracc_pre_post) / pracc_loop_byte;
int to_xfer = len > max_len ? max_len : len;
int partial_xfer = len != to_xfer;
int padded_len = (to_xfer + 3) & ~3;
*transferred = 0;
pracc_queue_init(&ctx);
- if (ctx.retval != ERROR_OK)
- goto exit;
- LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08x, %p, %d)",
+ LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08" PRIx32 ", %p, %d)",
target, ath79_info->io_base, data, len);
LOG_DEBUG("max code %d => max len %d. to_xfer %d",
- ctx.max_code, max_len, to_xfer);
+ PRACC_MAX_INSTRUCTIONS, max_len, to_xfer);
pracc_words = ath79_spi_bitbang_codegen(
ath79_info, &ctx, data, to_xfer, partial_xfer);
LOG_DEBUG("Assembled %d instructions, %d stores",
ctx.code_count, ctx.store_count);
- ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, out);
+ ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, out, 1);
if (ctx.retval != ERROR_OK)
goto exit;
return wait_till_ready(bank, ATH79_MAX_TIMEOUT);
}
-static int ath79_erase(struct flash_bank *bank, int first, int last)
+static int ath79_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
struct target *target = bank->target;
struct ath79_flash_bank *ath79_info = bank->driver_priv;
int retval = ERROR_OK;
- int sector;
- LOG_DEBUG("%s: from sector %d to sector %d", __func__, first, last);
+ LOG_DEBUG("%s: from sector %u to sector %u", __func__, first, last);
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
+ if ((last < first) || (last >= bank->num_sectors)) {
LOG_ERROR("Flash sector invalid");
return ERROR_FLASH_SECTOR_INVALID;
}
return ERROR_FLASH_BANK_NOT_PROBED;
}
- for (sector = first; sector <= last; sector++) {
+ if (ath79_info->dev->erase_cmd == 0x00)
+ return ERROR_FLASH_OPER_UNSUPPORTED;
+
+ for (unsigned sector = first; sector <= last; sector++) {
if (bank->sectors[sector].is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
+ LOG_ERROR("Flash sector %u protected", sector);
return ERROR_FAIL;
}
}
- for (sector = first; sector <= last; sector++) {
+ for (unsigned int sector = first; sector <= last; sector++) {
retval = ath79_erase_sector(bank, sector);
if (retval != ERROR_OK)
break;
return retval;
}
-static int ath79_protect(struct flash_bank *bank, int set,
- int first, int last)
+static int ath79_protect(struct flash_bank *bank, int set, unsigned int first,
+ unsigned int last)
{
- int sector;
-
- for (sector = first; sector <= last; sector++)
+ for (unsigned int sector = first; sector <= last; sector++)
bank->sectors[sector].is_protected = set;
return ERROR_OK;
}
address,
};
int retval;
- uint32_t i;
+ uint32_t i, pagesize;
+
+ /* if no write pagesize, use reasonable default */
+ pagesize = ath79_info->dev->pagesize ?
+ ath79_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
if (address & 0xff) {
- LOG_ERROR("ath79_write_page: unaligned write address: %08x",
+ LOG_ERROR("ath79_write_page: unaligned write address: %08" PRIx32,
address);
return ERROR_FAIL;
}
return ERROR_FAIL;
}
if (len > ath79_info->dev->pagesize) {
- LOG_ERROR("ath79_write_page: len bigger than page size %d: %d",
- ath79_info->dev->pagesize, len);
+ LOG_ERROR("ath79_write_page: len bigger than page size %" PRIu32 ": %" PRIu32,
+ pagesize, len);
return ERROR_FAIL;
}
if (i == len) /* all 0xff, no need to program. */
return ERROR_OK;
- LOG_INFO("writing %d bytes to flash page @0x%08x", len, address);
+ LOG_INFO("writing %" PRIu32 " bytes to flash page @0x%08" PRIx32, len, address);
memcpy(ath79_info->spi.page_buf, buffer, len);
uint32_t address, uint32_t len)
{
struct ath79_flash_bank *ath79_info = bank->driver_priv;
- const uint32_t page_size = ath79_info->dev->pagesize;
+ uint32_t page_size;
int retval;
LOG_DEBUG("%s: address=0x%08" PRIx32 " len=0x%08" PRIx32,
__func__, address, len);
+ /* if no valid page_size, use reasonable default */
+ page_size = ath79_info->dev->pagesize ?
+ ath79_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
+
while (len > 0) {
int page_len = len > page_size ? page_size : len;
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
- int sector;
LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32,
__func__, offset, count);
- if (offset < bank->base || offset >= bank->base + bank->size) {
- LOG_ERROR("Start address out of range");
- return ERROR_FAIL;
- }
-
- offset -= bank->base;
-
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
/* Check sector protection */
- for (sector = 0; sector < bank->num_sectors; sector++) {
+ for (unsigned int sector = 0; sector < bank->num_sectors; sector++) {
/* Start offset in or before this sector? */
/* End offset in or behind this sector? */
struct flash_sector *bs = &bank->sectors[sector];
if ((offset < (bs->offset + bs->size)) &&
((offset + count - 1) >= bs->offset) &&
bs->is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
+ LOG_ERROR("Flash sector %u protected", sector);
return ERROR_FAIL;
}
}
__func__, address, len);
if (address & 0xff) {
- LOG_ERROR("ath79_read_buffer: unaligned read address: %08x",
+ LOG_ERROR("ath79_read_buffer: unaligned read address: %08" PRIx32,
address);
return ERROR_FAIL;
}
- LOG_INFO("reading %d bytes from flash @0x%08x", len, address);
+ LOG_INFO("reading %" PRIu32 " bytes from flash @0x%08" PRIx32, len, address);
/* bitbang command */
ath79_spi_bitbang_prepare(bank);
LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32,
__func__, offset, count);
- if (offset < bank->base || offset >= bank->base + bank->size) {
- LOG_ERROR("Start address out of range");
- return ERROR_FAIL;
- }
-
- offset -= bank->base;
-
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
struct ath79_flash_bank *ath79_info = bank->driver_priv;
struct flash_sector *sectors;
uint32_t id = 0; /* silence uninitialized warning */
+ uint32_t pagesize, sectorsize;
const struct ath79_target *target_device;
int retval;
free(bank->sectors);
free(ath79_info->spi.page_buf);
}
- ath79_info->probed = 0;
+ ath79_info->probed = false;
for (target_device = target_devices; target_device->name;
++target_device)
ath79_info->io_base = target_device->io_base;
- LOG_DEBUG("Found device %s at address 0x%" PRIx32,
+ LOG_DEBUG("Found device %s at address " TARGET_ADDR_FMT,
target_device->name, bank->base);
retval = read_flash_id(bank, &id);
/* Set correct size value */
bank->size = ath79_info->dev->size_in_bytes;
+ if (bank->size <= (1UL << 16))
+ LOG_WARNING("device needs 2-byte addresses - not implemented");
+ if (bank->size > (1UL << 24))
+ LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
+
+ /* if no sectors, treat whole bank as single sector */
+ sectorsize = ath79_info->dev->sectorsize ?
+ ath79_info->dev->sectorsize : ath79_info->dev->size_in_bytes;
/* create and fill sectors array */
- bank->num_sectors =
- ath79_info->dev->size_in_bytes / ath79_info->dev->sectorsize;
+ bank->num_sectors = ath79_info->dev->size_in_bytes / sectorsize;
sectors = calloc(1, sizeof(struct flash_sector) * bank->num_sectors);
if (!sectors) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}
- ath79_info->spi.page_buf = malloc(ath79_info->dev->pagesize);
+
+ /* if no write pagesize, use reasonable default */
+ pagesize = ath79_info->dev->pagesize ? ath79_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
+
+ ath79_info->spi.page_buf = malloc(pagesize);
if (!ath79_info->spi.page_buf) {
LOG_ERROR("not enough memory");
free(sectors);
return ERROR_FAIL;
}
- for (int sector = 0; sector < bank->num_sectors; sector++) {
- sectors[sector].offset = sector * ath79_info->dev->sectorsize;
- sectors[sector].size = ath79_info->dev->sectorsize;
+ for (unsigned int sector = 0; sector < bank->num_sectors; sector++) {
+ sectors[sector].offset = sector * sectorsize;
+ sectors[sector].size = sectorsize;
sectors[sector].is_erased = 0;
sectors[sector].is_protected = 1;
}
bank->sectors = sectors;
- ath79_info->probed = 1;
+ ath79_info->probed = true;
return ERROR_OK;
}
return ERROR_OK;
}
-static int get_ath79_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_ath79_info(struct flash_bank *bank, struct command_invocation *cmd)
{
struct ath79_flash_bank *ath79_info = bank->driver_priv;
if (!ath79_info->probed) {
- snprintf(buf, buf_size,
- "\nATH79 flash bank not probed yet\n");
+ command_print_sameline(cmd, "\nATH79 flash bank not probed yet\n");
return ERROR_OK;
}
- snprintf(buf, buf_size, "\nATH79 flash information:\n"
+ command_print_sameline(cmd, "\nATH79 flash information:\n"
" Device \'%s\' (ID 0x%08" PRIx32 ")\n",
ath79_info->dev->name, ath79_info->dev->device_id);
return ERROR_OK;
}
-struct flash_driver ath79_flash = {
+const struct flash_driver ath79_flash = {
.name = "ath79",
.flash_bank_command = ath79_flash_bank_command,
.erase = ath79_erase,
.erase_check = ath79_flash_blank_check,
.protect_check = ath79_protect_check,
.info = get_ath79_info,
+ .free_driver_priv = default_flash_free_driver_priv,
};
Code Review / openocd.git / blobdiff