static void cfi_fixup(struct flash_bank *bank, const struct cfi_fixup *fixups)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- const struct cfi_fixup *f;
- for (f = fixups; f->fixup; f++) {
+ for (const struct cfi_fixup *f = fixups; f->fixup; f++) {
if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi_info->manufacturer)) &&
((f->id == CFI_ID_ANY) || (f->id == cfi_info->device_id)))
f->fixup(bank, f->param);
static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf)
{
- int i;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
/* clear whole buffer, to ensure bits that exceed the bus_width
* are set to zero
*/
- for (i = 0; i < CFI_MAX_BUS_WIDTH; i++)
+ for (size_t i = 0; i < CFI_MAX_BUS_WIDTH; i++)
cmd_buf[i] = 0;
if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) {
- for (i = bank->bus_width; i > 0; i--)
+ for (unsigned int i = bank->bus_width; i > 0; i--)
*cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd;
} else {
- for (i = 1; i <= bank->bus_width; i++)
+ for (unsigned int i = 1; i <= bank->bus_width; i++)
*cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd;
}
}
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
uint8_t data[CFI_MAX_BUS_WIDTH];
- int i;
int retval;
retval = cfi_target_read_memory(bank, cfi_flash_address(bank, sector, offset),
return retval;
if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) {
- for (i = 0; i < bank->bus_width / bank->chip_width; i++)
+ for (unsigned int i = 0; i < bank->bus_width / bank->chip_width; i++)
data[0] |= data[i];
*val = data[0];
} else {
uint8_t value = 0;
- for (i = 0; i < bank->bus_width / bank->chip_width; i++)
+ for (unsigned int i = 0; i < bank->bus_width / bank->chip_width; i++)
value |= data[bank->bus_width - 1 - i];
*val = value;
int retval;
if (cfi_info->x16_as_x8) {
- uint8_t i;
- for (i = 0; i < 2; i++) {
+ for (uint8_t i = 0; i < 2; i++) {
retval = cfi_target_read_memory(bank, cfi_flash_address(bank, sector, offset + i),
1, &data[i * bank->bus_width]);
if (retval != ERROR_OK)
int retval;
if (cfi_info->x16_as_x8) {
- uint8_t i;
- for (i = 0; i < 4; i++) {
+ for (uint8_t i = 0; i < 4; i++) {
retval = cfi_target_read_memory(bank, cfi_flash_address(bank, sector, offset + i),
1, &data[i * bank->bus_width]);
if (retval != ERROR_OK)
int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **argv)
{
struct cfi_flash_bank *cfi_info;
- int bus_swap = 0;
+ bool bus_swap = false;
if (argc < 6)
return ERROR_COMMAND_SYNTAX_ERROR;
}
cfi_info = malloc(sizeof(struct cfi_flash_bank));
- cfi_info->probed = 0;
+ cfi_info->probed = false;
cfi_info->erase_region_info = NULL;
cfi_info->pri_ext = NULL;
bank->driver_priv = cfi_info;
- cfi_info->x16_as_x8 = 0;
- cfi_info->jedec_probe = 0;
- cfi_info->not_cfi = 0;
- cfi_info->data_swap = 0;
+ cfi_info->x16_as_x8 = false;
+ cfi_info->jedec_probe = false;
+ cfi_info->not_cfi = false;
+ cfi_info->data_swap = false;
for (unsigned i = 6; i < argc; i++) {
if (strcmp(argv[i], "x16_as_x8") == 0)
- cfi_info->x16_as_x8 = 1;
+ cfi_info->x16_as_x8 = true;
else if (strcmp(argv[i], "data_swap") == 0)
- cfi_info->data_swap = 1;
+ cfi_info->data_swap = true;
else if (strcmp(argv[i], "bus_swap") == 0)
- bus_swap = 1;
+ bus_swap = true;
else if (strcmp(argv[i], "jedec_probe") == 0)
- cfi_info->jedec_probe = 1;
+ cfi_info->jedec_probe = true;
}
if (bus_swap)
return cfi_flash_bank_cmd(bank, CMD_ARGC, CMD_ARGV);
}
-static int cfi_intel_erase(struct flash_bank *bank, int first, int last)
+static int cfi_intel_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- int i;
cfi_intel_clear_status_register(bank);
- for (i = first; i <= last; i++) {
+ for (unsigned int i = first; i <= last; i++) {
retval = cfi_send_command(bank, 0x20, cfi_flash_address(bank, i, 0x0));
if (retval != ERROR_OK)
return retval;
if (retval != ERROR_OK)
return retval;
- LOG_ERROR("couldn't erase block %i of flash bank at base "
+ LOG_ERROR("couldn't erase block %u of flash bank at base "
TARGET_ADDR_FMT, i, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_OK;
}
-static int cfi_spansion_erase(struct flash_bank *bank, int first, int last)
+static int cfi_spansion_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- int i;
- for (i = first; i <= last; i++) {
+ for (unsigned int i = first; i <= last; i++) {
retval = cfi_spansion_unlock_seq(bank);
if (retval != ERROR_OK)
return retval;
return cfi_send_command(bank, 0xf0, cfi_flash_address(bank, 0, 0x0));
}
-int cfi_erase(struct flash_bank *bank, int first, int last)
+int cfi_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
return ERROR_TARGET_NOT_HALTED;
}
- if ((first < 0) || (last < first) || (last >= bank->num_sectors))
+ if ((last < first) || (last >= bank->num_sectors))
return ERROR_FLASH_SECTOR_INVALID;
if (cfi_info->qry[0] != 'Q')
case 1:
case 3:
return cfi_intel_erase(bank, first, last);
- break;
case 2:
return cfi_spansion_erase(bank, first, last);
- break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
return ERROR_OK;
}
-static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int last)
+static int cfi_intel_protect(struct flash_bank *bank, int set,
+ unsigned int first, unsigned int last)
{
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
int retry = 0;
- int i;
/* if the device supports neither legacy lock/unlock (bit 3) nor
* instant individual block locking (bit 5).
cfi_intel_clear_status_register(bank);
- for (i = first; i <= last; i++) {
+ for (unsigned int i = first; i <= last; i++) {
retval = cfi_send_command(bank, 0x60, cfi_flash_address(bank, i, 0x0));
if (retval != ERROR_OK)
return retval;
* 3. re-protect what should be protected.
*
*/
- for (i = 0; i < bank->num_sectors; i++) {
+ for (unsigned int i = 0; i < bank->num_sectors; i++) {
if (bank->sectors[i].is_protected == 1) {
cfi_intel_clear_status_register(bank);
return cfi_send_command(bank, 0xff, cfi_flash_address(bank, 0, 0x0));
}
-int cfi_protect(struct flash_bank *bank, int set, int first, int last)
+int cfi_protect(struct flash_bank *bank, int set, unsigned int first,
+ unsigned int last)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
case 1:
case 3:
return cfi_intel_protect(bank, set, first, last);
- break;
default:
LOG_WARNING("protect: cfi primary command set %i unsupported", cfi_info->pri_id);
return ERROR_OK;
switch (bank->bus_width) {
case 1:
return buf[0];
- break;
case 2:
return target_buffer_get_u16(target, buf);
- break;
case 4:
return target_buffer_get_u32(target, buf);
- break;
default:
- LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
+ LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes",
bank->bus_width);
return 0;
}
* r6: error test pattern
*/
- /* see contib/loaders/flash/armv4_5_cfi_intel_32.s for src */
+ /* see contrib/loaders/flash/armv4_5_cfi_intel_32.s for src */
static const uint32_t word_32_code[] = {
0xe4904004, /* loop: ldr r4, [r0], #4 */
0xe5813000, /* str r3, [r1] */
0xeafffffe /* done: b -2 */
};
- /* see contib/loaders/flash/armv4_5_cfi_intel_16.s for src */
+ /* see contrib/loaders/flash/armv4_5_cfi_intel_16.s for src */
static const uint32_t word_16_code[] = {
0xe0d040b2, /* loop: ldrh r4, [r0], #2 */
0xe1c130b0, /* strh r3, [r1] */
0xeafffffe /* done: b -2 */
};
- /* see contib/loaders/flash/armv4_5_cfi_intel_8.s for src */
+ /* see contrib/loaders/flash/armv4_5_cfi_intel_8.s for src */
static const uint32_t word_8_code[] = {
0xe4d04001, /* loop: ldrb r4, [r0], #1 */
0xe5c13000, /* strb r3, [r1] */
cfi_intel_clear_status_register(bank);
- /* If we are setting up the write_algorith, we need target_code_src
+ /* If we are setting up the write_algorithm, we need target_code_src
* if not we only need target_code_size. */
/* However, we don't want to create multiple code paths, so we
target_code_size = sizeof(word_32_code);
break;
default:
- LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
+ LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes",
bank->bus_width);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
if (retval != ERROR_OK) {
cfi_intel_clear_status_register(bank);
LOG_ERROR(
- "Execution of flash algorythm failed. Can't fall back. Please report.");
+ "Execution of flash algorithm failed. Can't fall back. Please report.");
retval = ERROR_FLASH_OPERATION_FAILED;
/* retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; */
/* FIXME To allow fall back or recovery, we must save the actual status
}
break;
default:
- LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
+ LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes",
bank->bus_width);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
* R10 = unlock2_addr
* R11 = unlock2_cmd */
- /* see contib/loaders/flash/armv4_5_cfi_span_32.s for src */
+ /* see contrib/loaders/flash/armv4_5_cfi_span_32.s for src */
static const uint32_t armv4_5_word_32_code[] = {
/* 00008100 <sp_32_code>: */
0xe4905004, /* ldr r5, [r0], #4 */
0xeafffffe /* b 8154 <sp_32_done> */
};
- /* see contib/loaders/flash/armv4_5_cfi_span_16.s for src */
+ /* see contrib/loaders/flash/armv4_5_cfi_span_16.s for src */
static const uint32_t armv4_5_word_16_code[] = {
/* 00008158 <sp_16_code>: */
0xe0d050b2, /* ldrh r5, [r0], #2 */
target_code_size = sizeof(armv4_5_word_32_code);
break;
default:
- LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
+ LOG_ERROR("Unsupported bank buswidth %u, can't do block memory writes",
bank->bus_width);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
case 1:
case 3:
return cfi_intel_write_word(bank, word, address);
- break;
case 2:
return cfi_spansion_write_word(bank, word, address);
- break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
case 1:
case 3:
return cfi_intel_write_words(bank, word, wordcount, address);
- break;
case 2:
return cfi_spansion_write_words(bank, word, wordcount, address);
- break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
uint32_t read_p;
int align; /* number of unaligned bytes */
uint8_t current_word[CFI_MAX_BUS_WIDTH];
- int i;
int retval;
LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
return retval;
/* take only bytes we need */
- for (i = align; (i < bank->bus_width) && (count > 0); i++, count--)
+ for (unsigned int i = align; (i < bank->bus_width) && (count > 0); i++, count--)
*buffer++ = current_word[i];
read_p += bank->bus_width;
return retval;
/* take only bytes we need */
- for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
+ for (unsigned int i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
*buffer++ = current_word[i];
}
*programmed */
uint8_t *swapped_buffer = NULL;
const uint8_t *real_buffer = NULL;
- int i;
int retval;
if (bank->target->state != TARGET_HALTED) {
return retval;
/* replace only bytes that must be written */
- for (i = align;
- (i < bank->bus_width) && (count > 0);
- i++, count--)
+ for (unsigned int i = align; (i < bank->bus_width) && (count > 0); i++, count--)
if (cfi_info->data_swap)
/* data bytes are swapped (reverse endianness) */
current_word[bank->bus_width - i] = *buffer++;
break;
}
if (retval == ERROR_OK) {
- /* Increment pointers and decrease count on succesful block write */
+ /* Increment pointers and decrease count on successful block write */
buffer += blk_count;
write_p += blk_count;
count -= blk_count;
/* fall back to memory writes */
while (count >= (uint32_t)bank->bus_width) {
- int fallback;
+ bool fallback;
if ((write_p & 0xff) == 0) {
LOG_INFO("Programming at 0x%08" PRIx32 ", count 0x%08"
PRIx32 " bytes remaining", write_p, count);
}
- fallback = 1;
+ fallback = true;
if ((bufferwsize > 0) && (count >= buffersize) &&
!(write_p & buffermask)) {
retval = cfi_write_words(bank, buffer, bufferwsize, write_p);
buffer += buffersize;
write_p += buffersize;
count -= buffersize;
- fallback = 0;
+ fallback = false;
} else if (retval != ERROR_FLASH_OPER_UNSUPPORTED)
return retval;
}
/* try the slow way? */
if (fallback) {
- for (i = 0; i < bank->bus_width; i++)
+ for (unsigned int i = 0; i < bank->bus_width; i++)
current_word[i] = *buffer++;
retval = cfi_write_word(bank, current_word, write_p);
return retval;
/* replace only bytes that must be written */
- for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
+ for (unsigned int i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
if (cfi_info->data_swap)
/* data bytes are swapped (reverse endianness) */
current_word[bank->bus_width - i] = *buffer++;
static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *param)
{
- int i;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
(void) param;
if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3)) {
LOG_DEBUG("swapping reversed erase region information on cmdset 0002 device");
- for (i = 0; i < cfi_info->num_erase_regions / 2; i++) {
+ for (unsigned int i = 0; i < cfi_info->num_erase_regions / 2; i++) {
int j = (cfi_info->num_erase_regions - 1) - i;
uint32_t swap;
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct target *target = bank->target;
- int num_sectors = 0;
- int i;
+ unsigned int num_sectors = 0;
int sector = 0;
uint32_t unlock1 = 0x555;
uint32_t unlock2 = 0x2aa;
return ERROR_TARGET_NOT_HALTED;
}
- cfi_info->probed = 0;
+ cfi_info->probed = false;
cfi_info->num_erase_regions = 0;
if (bank->sectors) {
free(bank->sectors);
cfi_info->device_id = target_buffer_get_u32(target, value_buf1);
break;
default:
- LOG_ERROR("Unsupported bank chipwidth %d, can't probe memory",
+ LOG_ERROR("Unsupported bank chipwidth %u, can't probe memory",
bank->chip_width);
return ERROR_FLASH_OPERATION_FAILED;
}
/* query only if this is a CFI compatible flash,
* otherwise the relevant info has already been filled in
*/
- if (cfi_info->not_cfi == 0) {
+ if (!cfi_info->not_cfi) {
/* enter CFI query mode
* according to JEDEC Standard No. 68.01,
* a single bus sequence with address = 0x55, data = 0x98 should put
if (cfi_info->num_erase_regions) {
cfi_info->erase_region_info = malloc(sizeof(*cfi_info->erase_region_info)
* cfi_info->num_erase_regions);
- for (i = 0; i < cfi_info->num_erase_regions; i++) {
+ for (unsigned int i = 0; i < cfi_info->num_erase_regions; i++) {
retval = cfi_query_u32(bank,
0,
0x2d + (4 * i),
*for
*all
*CFI
- *flashs
+ *flashes
**/
cfi_read_0002_pri_ext(bank);
break;
} else {
uint32_t offset = 0;
- for (i = 0; i < cfi_info->num_erase_regions; i++)
+ for (unsigned int i = 0; i < cfi_info->num_erase_regions; i++)
num_sectors += (cfi_info->erase_region_info[i] & 0xffff) + 1;
bank->num_sectors = num_sectors;
bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
- for (i = 0; i < cfi_info->num_erase_regions; i++) {
- uint32_t j;
- for (j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++) {
+ for (unsigned int i = 0; i < cfi_info->num_erase_regions; i++) {
+ for (uint32_t j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++) {
bank->sectors[sector].offset = offset;
bank->sectors[sector].size =
((cfi_info->erase_region_info[i] >> 16) * 256)
}
if (offset != (cfi_info->dev_size * bank->bus_width / bank->chip_width)) {
LOG_WARNING(
- "CFI size is 0x%" PRIx32 ", but total sector size is 0x%" PRIx32 "", \
+ "CFI size is 0x%" PRIx32 ", but total sector size is 0x%" PRIx32 "",
(cfi_info->dev_size * bank->bus_width / bank->chip_width),
offset);
}
}
- cfi_info->probed = 1;
+ cfi_info->probed = true;
return ERROR_OK;
}
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
- int i;
/* check if block lock bits are supported on this device */
if (!(pri_ext->blk_status_reg_mask & 0x1))
if (retval != ERROR_OK)
return retval;
- for (i = 0; i < bank->num_sectors; i++) {
+ for (unsigned int i = 0; i < bank->num_sectors; i++) {
uint8_t block_status;
retval = cfi_get_u8(bank, i, 0x2, &block_status);
if (retval != ERROR_OK)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- int i;
retval = cfi_spansion_unlock_seq(bank);
if (retval != ERROR_OK)
if (retval != ERROR_OK)
return retval;
- for (i = 0; i < bank->num_sectors; i++) {
+ for (unsigned int i = 0; i < bank->num_sectors; i++) {
uint8_t block_status;
retval = cfi_get_u8(bank, i, 0x2, &block_status);
if (retval != ERROR_OK)
case 1:
case 3:
return cfi_intel_protect_check(bank);
- break;
case 2:
return cfi_spansion_protect_check(bank);
- break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
return ERROR_OK;
}
- if (cfi_info->not_cfi == 0)
+ if (!cfi_info->not_cfi)
printed = snprintf(buf, buf_size, "\nCFI flash: ");
else
printed = snprintf(buf, buf_size, "\nnon-CFI flash: ");
Code Review / openocd.git / blobdiff