/* CFI fixups foward declarations */
static void cfi_fixup_0002_erase_regions(struct flash_bank *flash, void *param);
static void cfi_fixup_0002_unlock_addresses(struct flash_bank *flash, void *param);
-static void cfi_fixup_atmel_reversed_erase_regions(struct flash_bank *flash, void *param);
+static void cfi_fixup_reversed_erase_regions(struct flash_bank *flash, void *param);
/* fixup after reading cmdset 0002 primary query table */
static const struct cfi_fixup cfi_0002_fixups[] = {
{CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D7, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x2780, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
- {CFI_MFR_ATMEL, 0x00C8, cfi_fixup_atmel_reversed_erase_regions, NULL},
+ {CFI_MFR_ATMEL, 0x00C8, cfi_fixup_reversed_erase_regions, NULL},
+ {CFI_MFR_ST, 0x22C4, cfi_fixup_reversed_erase_regions, NULL}, /* M29W160ET */
{CFI_MFR_FUJITSU, 0x22ea, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
{CFI_MFR_FUJITSU, 0x226b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_AMIC, 0xb31a, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
* instant individual block locking (bit 5).
*/
if (!(pri_ext->feature_support & 0x28))
+ {
+ LOG_ERROR("lock/unlock not supported on flash");
return ERROR_FLASH_OPERATION_FAILED;
+ }
cfi_intel_clear_status_register(bank);
return cfi_reset(bank);
}
-static void cfi_fixup_atmel_reversed_erase_regions(struct flash_bank *bank, void *param)
+static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, void *param)
{
(void) param;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
*/
if (cfi_info->not_cfi == 0)
{
- int retval;
-
/* enter CFI query mode
* according to JEDEC Standard No. 68.01,
* a single bus sequence with address = 0x55, data = 0x98 should put
(1 << cfi_info->chip_erase_timeout_max) * (1 << cfi_info->chip_erase_timeout_typ));
uint8_t data;
- retval = 1 << cfi_query_u8(bank, 0, 0x27, &data);
+ retval = cfi_query_u8(bank, 0, 0x27, &data);
if (retval != ERROR_OK)
return retval;
- cfi_info->dev_size = data;
+ cfi_info->dev_size = 1 << data;
retval = cfi_query_u16(bank, 0, 0x28, &cfi_info->interface_desc);
if (retval != ERROR_OK)
return ERROR_OK;
}
-static int cfi_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_cfi_info(struct flash_bank *bank, char *buf, int buf_size)
{
int printed;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
/* FIXME: access flash at bus_width size */
.erase_check = default_flash_blank_check,
.protect_check = cfi_protect_check,
- .info = cfi_info,
+ .info = get_cfi_info,
};