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flash: nor: {pic32mx,cfi}: fix register names
[openocd.git] / src / flash / nor / cfi.c
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index c443de2dd666669cb1e497ce2c2ced3842fd03c5..efa0aeecf00a5c96aca8f43e039e6a1247f90d71 100644 (file)
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -1103,19 +1103,6 @@ static int cfi_protect(struct flash_bank *bank, int set, int first, int last)
        }
 }
 
-/* Convert code image to target endian
- * FIXME create general block conversion fcts in target.c?) */
-static void cfi_fix_code_endian(struct target *target, uint8_t *dest,
-       const uint32_t *src, uint32_t count)
-{
-       uint32_t i;
-       for (i = 0; i < count; i++) {
-               target_buffer_set_u32(target, dest, *src);
-               dest += 4;
-               src++;
-       }
-}
-
 static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd)
 {
        struct target *target = bank->target;
@@ -1139,7 +1126,7 @@ static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd)
        }
 }
 
-static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
        uint32_t address, uint32_t count)
 {
        struct target *target = bank->target;
@@ -1226,7 +1213,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer,
                arm_algo.core_state = ARM_STATE_ARM;
        } else {
                LOG_ERROR("Unknown architecture");
-               return ERROR_FAIL;
+               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
        cfi_intel_clear_status_register(bank);
@@ -1264,7 +1251,8 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer,
                                "Increase CFI_MAX_INTEL_CODESIZE and recompile.");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
-       cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4);
+
+       target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src);
 
        /* Get memory for block write handler */
        retval = target_alloc_working_area(target,
@@ -1391,7 +1379,7 @@ cleanup:
        return retval;
 }
 
-static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffer,
+static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t *buffer,
        uint32_t address, uint32_t count)
 {
        struct cfi_flash_bank *cfi_info = bank->driver_priv;
@@ -1504,7 +1492,8 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe
                LOG_ERROR("Out of memory");
                return ERROR_FAIL;
        }
-       cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4);
+
+       target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src);
 
        /* allocate working area */
        retval = target_alloc_working_area(target, target_code_size,
@@ -1540,16 +1529,16 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe
        }
        ;
 
-       init_reg_param(&reg_params[0], "a0", 32, PARAM_OUT);
-       init_reg_param(&reg_params[1], "a1", 32, PARAM_OUT);
-       init_reg_param(&reg_params[2], "a2", 32, PARAM_OUT);
-       init_reg_param(&reg_params[3], "a3", 32, PARAM_OUT);
-       init_reg_param(&reg_params[4], "t0", 32, PARAM_OUT);
-       init_reg_param(&reg_params[5], "t1", 32, PARAM_IN);
-       init_reg_param(&reg_params[6], "t4", 32, PARAM_OUT);
-       init_reg_param(&reg_params[7], "t5", 32, PARAM_OUT);
-       init_reg_param(&reg_params[8], "t6", 32, PARAM_OUT);
-       init_reg_param(&reg_params[9], "t7", 32, PARAM_OUT);
+       init_reg_param(&reg_params[0], "r4", 32, PARAM_OUT);
+       init_reg_param(&reg_params[1], "r5", 32, PARAM_OUT);
+       init_reg_param(&reg_params[2], "r6", 32, PARAM_OUT);
+       init_reg_param(&reg_params[3], "r7", 32, PARAM_OUT);
+       init_reg_param(&reg_params[4], "r8", 32, PARAM_OUT);
+       init_reg_param(&reg_params[5], "r9", 32, PARAM_IN);
+       init_reg_param(&reg_params[6], "r12", 32, PARAM_OUT);
+       init_reg_param(&reg_params[7], "r13", 32, PARAM_OUT);
+       init_reg_param(&reg_params[8], "r14", 32, PARAM_OUT);
+       init_reg_param(&reg_params[9], "r15", 32, PARAM_OUT);
 
        while (count > 0) {
                uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
@@ -1603,7 +1592,7 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe
        return retval;
 }
 
-static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buffer,
        uint32_t address, uint32_t count)
 {
        struct cfi_flash_bank *cfi_info = bank->driver_priv;
@@ -1822,7 +1811,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
                arm_algo = &armv4_5_algo;
        } else {
                LOG_ERROR("Unknown architecture");
-               return ERROR_FAIL;
+               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
        int target_code_size = 0;
@@ -1883,7 +1872,8 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
                LOG_ERROR("Out of memory");
                return ERROR_FAIL;
        }
-       cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4);
+
+       target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src);
 
        /* allocate working area */
        retval = target_alloc_working_area(target, target_code_size,
@@ -2012,7 +2002,7 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t
        return ERROR_OK;
 }
 
-static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word,
+static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word,
        uint32_t wordcount, uint32_t address)
 {
        int retval;
@@ -2132,7 +2122,7 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3
        return ERROR_OK;
 }
 
-static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word,
+static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word,
        uint32_t wordcount, uint32_t address)
 {
        int retval;
@@ -2225,7 +2215,7 @@ static int cfi_write_word(struct flash_bank *bank, uint8_t *word, uint32_t addre
        return ERROR_FLASH_OPERATION_FAILED;
 }
 
-static int cfi_write_words(struct flash_bank *bank, uint8_t *word,
+static int cfi_write_words(struct flash_bank *bank, const uint8_t *word,
        uint32_t wordcount, uint32_t address)
 {
        struct cfi_flash_bank *cfi_info = bank->driver_priv;
@@ -2307,7 +2297,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
        }
 
        if (count) {
-               LOG_INFO("Fixup %d unaligned read tail bytes", count);
+               LOG_INFO("Fixup %" PRIu32 " unaligned read tail bytes", count);
 
                /* read a complete word from flash */
                retval = target_read_memory(target, read_p, bank->bus_width, 1, current_word);
@@ -2322,7 +2312,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
        return ERROR_OK;
 }
 
-static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
 {
        struct cfi_flash_bank *cfi_info = bank->driver_priv;
        struct target *target = bank->target;
@@ -2506,9 +2496,9 @@ static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, const void
 static void cfi_fixup_0002_polling_bits(struct flash_bank *bank, const void *param)
 {
        struct cfi_flash_bank *cfi_info = bank->driver_priv;
-       const int status_poll_mask = *(const int *)param;
+       const int *status_poll_mask = param;
 
-       cfi_info->status_poll_mask = status_poll_mask;
+       cfi_info->status_poll_mask = *status_poll_mask;
 }
 
 
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