unsigned cpu_mhz = 120;
unsigned idx;
bool use_nvm_marking = false;
- char flash_marking[8], nvm_marking[2];
+ char flash_marking[11], nvm_marking[2];
char name[40];
k_chip->probed = false;
case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX1: /* errata 7534 - should be K63 */
case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX2: /* errata 7534 - should be K64 */
subfamid += 2; /* errata 7534 fix */
+ /* fallthrough */
case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX3:
/* K63FN1M0 */
case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX4:
if (num_blocks == 0)
num_blocks = k_chip->fcfg2_maxaddr1_shifted ? 2 : 1;
- else if (k_chip->fcfg2_maxaddr1_shifted == 0 && num_blocks >= 2) {
+ else if (k_chip->fcfg2_maxaddr1_shifted == 0 && num_blocks >= 2 && fcfg2_pflsh) {
+ /* fcfg2_maxaddr1 may be zero due to partitioning whole NVM as EEPROM backup
+ * Do not adjust block count in this case! */
num_blocks = 1;
LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
} else if (k_chip->fcfg2_maxaddr1_shifted != 0 && num_blocks == 1) {
case 0x06:
k_chip->dflash_size = k_chip->nvm_size - (4096 << fcfg1_depart);
break;
+ case 0x07:
case 0x08:
k_chip->dflash_size = 0;
break;
/* Program section size is equal to sector size by default */
}
- k_chip->num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
- k_chip->num_nvm_blocks = num_blocks - k_chip->num_pflash_blocks;
+ if (fcfg2_pflsh) {
+ k_chip->num_pflash_blocks = num_blocks;
+ k_chip->num_nvm_blocks = 0;
+ } else {
+ k_chip->num_pflash_blocks = (num_blocks + 1) / 2;
+ k_chip->num_nvm_blocks = num_blocks - k_chip->num_pflash_blocks;
+ }
if (use_nvm_marking) {
nvm_marking[0] = k_chip->num_nvm_blocks ? 'X' : 'N';