ERASE_REGION(128, 4*KB)
}
},
+ {
+ .mfr = CFI_MFR_AMD, /* Spansion AM29LV040B */
+ .id = 0x4f,
+ .pri_id = 0x02,
+ .dev_size = 512*KB,
+ .interface_desc = 0x0, /* x8 only device */
+ .max_buf_write_size = 0x0,
+ .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
+ .num_erase_regions = 1,
+ .erase_region_info =
+ {
+ ERASE_REGION(8, 64*KB)
+ }
+ },
{
.mfr = CFI_MFR_SST,
.id = 0x2780,
ERASE_REGION(512, 4*KB)
}
},
+ {
+ .mfr = CFI_MFR_SST,
+ .id = 0x274b, /* SST39WF1601 */
+ .pri_id = 0x02,
+ .dev_size = 2*MB,
+ .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
+ .max_buf_write_size = 0x0,
+ .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
+ .num_erase_regions = 1,
+ .erase_region_info =
+ {
+ ERASE_REGION(512, 4*KB)
+ }
+ },
{
.mfr = CFI_MFR_SST,
.id = 0x234a, /* SST39VF1602 */
ERASE_REGION(1, 16*KB)
}
},
+ {
+ .mfr = CFI_MFR_EON,
+ .id = 0x225b, /* EN29LV800BB */
+ .pri_id = 0x02,
+ .dev_size = 1*MB,
+ .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
+ .max_buf_write_size = 0x0,
+ .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
+ .num_erase_regions = 4,
+ .erase_region_info =
+ {
+ ERASE_REGION(1, 16*KB),
+ ERASE_REGION(2, 8*KB),
+ ERASE_REGION(1, 32*KB),
+ ERASE_REGION(15, 64*KB)
+ }
+ },
{
.mfr = CFI_MFR_ATMEL,
.id = 0x00c0, /* Atmel 49BV1614 */
void cfi_fixup_non_cfi(struct flash_bank *bank)
{
+ unsigned int mask;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct non_cfi *non_cfi = non_cfi_flashes;
+ if(cfi_info->x16_as_x8)
+ mask = 0xFF;
+ else
+ mask = 0xFFFF;
+
for (non_cfi = non_cfi_flashes; non_cfi->mfr; non_cfi++)
{
if ((cfi_info->manufacturer == non_cfi->mfr)
- && (cfi_info->device_id == non_cfi->id))
+ && (cfi_info->device_id == (non_cfi->id & mask)))
{
break;
}
cfi_info->vcc_max = 0x0;
cfi_info->vpp_min = 0x0;
cfi_info->vpp_max = 0x0;
- cfi_info->word_write_timeout_typ = 0x0;
- cfi_info->buf_write_timeout_typ = 0x0;
- cfi_info->block_erase_timeout_typ = 0x0;
- cfi_info->chip_erase_timeout_typ = 0x0;
+ /* these are used for timeouts - use vales that should be long enough
+ for normal operation. */
+ cfi_info->word_write_timeout_typ = 0x0a;
+ cfi_info->buf_write_timeout_typ = 0x0d;
+ cfi_info->block_erase_timeout_typ = 0x0d;
+ cfi_info->chip_erase_timeout_typ = 0x10;
cfi_info->word_write_timeout_max = 0x0;
cfi_info->buf_write_timeout_max = 0x0;
cfi_info->block_erase_timeout_max = 0x0;