#include <target/algorithm.h>
#include <target/armv7m.h>
#include <helper/types.h>
+#include <helper/time_support.h>
enum {
NRF5_FLASH_BASE = 0x00000000,
NRF5_DEVICE_DEF(0x007A, "51422", "CEAA", "C0", 256),
NRF5_DEVICE_DEF(0x0088, "51422", "CFAC", "A0", 256),
+ /* nRF52810 Devices */
+ NRF5_DEVICE_DEF(0x0142, "52810", "QFAA", "B0", 192),
+ NRF5_DEVICE_DEF(0x0143, "52810", "QCAA", "C0", 192),
+
/* nRF52832 Devices */
NRF5_DEVICE_DEF(0x00C7, "52832", "QFAA", "B0", 512),
NRF5_DEVICE_DEF(0x0139, "52832", "QFAA", "E0", 512),
+ NRF5_DEVICE_DEF(0x00E3, "52832", "CIAA", "B0", 512),
+
+ /* nRF52840 Devices */
+ NRF5_DEVICE_DEF(0x0150, "52840", "QIAA", "C0", 1024),
};
static int nrf5_bank_is_probed(struct flash_bank *bank)
{
uint32_t ready;
int res;
- int timeout = 100;
+ int timeout_ms = 340;
+ int64_t ts_start = timeval_ms();
do {
res = target_read_u32(chip->target, NRF5_NVMC_READY, &ready);
if (ready == 0x00000001)
return ERROR_OK;
- alive_sleep(1);
- } while (timeout--);
+ keep_alive();
+
+ } while ((timeval_ms()-ts_start) < timeout_ms);
LOG_DEBUG("Timed out waiting for NVMC_READY");
return ERROR_FLASH_BUSY;
bank->bank_number = 1;
break;
default:
- LOG_ERROR("Invalid bank address 0x%08" PRIx32, bank->base);
+ LOG_ERROR("Invalid bank address " TARGET_ADDR_FMT, bank->base);
return ERROR_FAIL;
}
.handler = nrf5_handle_mass_erase_command,
.mode = COMMAND_EXEC,
.help = "Erase all flash contents of the chip.",
+ .usage = "",
},
COMMAND_REGISTRATION_DONE
};
COMMAND_REGISTRATION_DONE
};
-struct flash_driver nrf5_flash = {
+const struct flash_driver nrf5_flash = {
.name = "nrf5",
.commands = nrf5_command_handlers,
.flash_bank_command = nrf5_flash_bank_command,
/* We need to retain the flash-driver name as well as the commands
* for backwards compatability */
-struct flash_driver nrf51_flash = {
+const struct flash_driver nrf51_flash = {
.name = "nrf51",
.commands = nrf5_command_handlers,
.flash_bank_command = nrf5_flash_bank_command,