Remove FSF address from GPL notices

[openocd.git] / src / flash / nor / nrf51.c

diff --git a/src/flash/nor/nrf51.c b/src/flash/nor/nrf51.c
index 351a86e49cc0543b1c72ecd905c343132bffea56..69bf666163ff757a348f9c18ab49d2a435bad179 100644 (file)
--- a/src/flash/nor/nrf51.c
+++ b/src/flash/nor/nrf51.c
@@ -15,9 +15,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -128,6 +126,18 @@ struct nrf51_device_spec {
        unsigned int flash_size_kb;
 };
 
+/* The known devices table below is derived from the "nRF51 Series
+ * Compatibility Matrix" document, which can be found by searching for
+ * ATTN-51 on the Nordic Semi website:
+ *
+ * http://www.nordicsemi.com/eng/content/search?SearchText=ATTN-51
+ *
+ * Up to date with Matrix v2.0, plus some additional HWIDs.
+ *
+ * The additional HWIDs apply where the build code in the matrix is
+ * shown as Gx0, Bx0, etc. In these cases the HWID in the matrix is
+ * for x==0, x!=0 means different (unspecified) HWIDs.
+ */
 static const struct nrf51_device_spec nrf51_known_devices_table[] = {
        /* nRF51822 Devices (IC rev 1). */
        {
@@ -177,13 +187,25 @@ static const struct nrf51_device_spec nrf51_known_devices_table[] = {
        {
                .hwid           = 0x003C,
                .variant        = "QFAA",
-               .build_code     = "Gx0",
+               .build_code     = "G0",
+               .flash_size_kb  = 256,
+       },
+       {
+               .hwid           = 0x0057,
+               .variant        = "QFAA",
+               .build_code     = "G2",
+               .flash_size_kb  = 256,
+       },
+       {
+               .hwid           = 0x0058,
+               .variant        = "QFAA",
+               .build_code     = "G3",
                .flash_size_kb  = 256,
        },
        {
                .hwid           = 0x004C,
                .variant        = "QFAB",
-               .build_code     = "Bx0",
+               .build_code     = "B0",
                .flash_size_kb  = 128,
        },
        {
@@ -209,37 +231,43 @@ static const struct nrf51_device_spec nrf51_known_devices_table[] = {
        {
                .hwid           = 0x0072,
                .variant        = "QFAA",
-               .build_code     = "Hx0",
+               .build_code     = "H0",
                .flash_size_kb  = 256,
        },
        {
                .hwid           = 0x007B,
                .variant        = "QFAB",
-               .build_code     = "Cx0",
+               .build_code     = "C0",
                .flash_size_kb  = 128,
        },
        {
                .hwid           = 0x0083,
                .variant        = "QFAC",
-               .build_code     = "Ax0",
+               .build_code     = "A0",
+               .flash_size_kb  = 256,
+       },
+       {
+               .hwid           = 0x0084,
+               .variant        = "QFAC",
+               .build_code     = "A1",
                .flash_size_kb  = 256,
        },
        {
                .hwid           = 0x007D,
                .variant        = "CDAB",
-               .build_code     = "Ax0",
+               .build_code     = "A0",
                .flash_size_kb  = 128,
        },
        {
                .hwid           = 0x0079,
                .variant        = "CEAA",
-               .build_code     = "Ex0",
+               .build_code     = "E0",
                .flash_size_kb  = 256,
        },
        {
                .hwid           = 0x0087,
                .variant        = "CFAC",
-               .build_code     = "Ax0",
+               .build_code     = "A0",
                .flash_size_kb  = 256,
        },
 
@@ -273,7 +301,7 @@ static const struct nrf51_device_spec nrf51_known_devices_table[] = {
        {
                .hwid           = 0x002E,
                .variant        = "QFAA",
-               .build_code     = "Ex0",
+               .build_code     = "E0",
                .flash_size_kb  = 256,
        },
        {
@@ -285,7 +313,7 @@ static const struct nrf51_device_spec nrf51_known_devices_table[] = {
        {
                .hwid           = 0x0050,
                .variant        = "CEAA",
-               .build_code     = "Bx0",
+               .build_code     = "B0",
                .flash_size_kb  = 256,
        },
 
@@ -293,37 +321,43 @@ static const struct nrf51_device_spec nrf51_known_devices_table[] = {
        {
                .hwid           = 0x0073,
                .variant        = "QFAA",
-               .build_code     = "Fx0",
+               .build_code     = "F0",
                .flash_size_kb  = 256,
        },
        {
                .hwid           = 0x007C,
                .variant        = "QFAB",
-               .build_code     = "Bx0",
+               .build_code     = "B0",
                .flash_size_kb  = 128,
        },
        {
                .hwid           = 0x0085,
                .variant        = "QFAC",
-               .build_code     = "Ax0",
+               .build_code     = "A0",
+               .flash_size_kb  = 256,
+       },
+       {
+               .hwid           = 0x0086,
+               .variant        = "QFAC",
+               .build_code     = "A1",
                .flash_size_kb  = 256,
        },
        {
                .hwid           = 0x007E,
                .variant        = "CDAB",
-               .build_code     = "Ax0",
+               .build_code     = "A0",
                .flash_size_kb  = 128,
        },
        {
                .hwid           = 0x007A,
                .variant        = "CEAA",
-               .build_code     = "Cx0",
+               .build_code     = "C0",
                .flash_size_kb  = 256,
        },
        {
                .hwid           = 0x0088,
                .variant        = "CFAC",
-               .build_code     = "Ax0",
+               .build_code     = "A0",
                .flash_size_kb  = 256,
        },
 
@@ -551,7 +585,7 @@ static int nrf51_protect(struct flash_bank *bank, int set, int first, int last)
        if ((ppfc & 0xFF) == 0x00) {
                LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings");
                return ERROR_FAIL;
-       };
+       }
 
        res = target_read_u32(chip->target, NRF51_UICR_CLENR0,
                              &clenr0);
@@ -731,7 +765,7 @@ static int nrf51_erase_page(struct flash_bank *bank,
 
                        LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region");
                        return ERROR_FAIL;
-               };
+               }
 
                res = nrf51_nvmc_generic_erase(chip,
                                               NRF51_NVMC_ERASEUICR,
@@ -1112,7 +1146,7 @@ COMMAND_HANDLER(nrf51_handle_mass_erase_command)
                LOG_ERROR("Code region 0 size was pre-programmed at the factory, "
                          "mass erase command won't work.");
                return ERROR_FAIL;
-       };
+       }
 
        res = nrf51_erase_all(chip);
        if (res != ERROR_OK) {