0x00000000 /* nop */
};
-static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
row_size = 512;
}
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(pic32mx_flash_write_code), (uint8_t *)pic32mx_flash_write_code);
+ uint8_t code[sizeof(pic32mx_flash_write_code)];
+ target_buffer_set_u32_array(target, code, ARRAY_SIZE(pic32mx_flash_write_code),
+ pic32mx_flash_write_code);
+ retval = target_write_buffer(target, write_algorithm->address, sizeof(code), code);
if (retval != ERROR_OK)
return retval;
mips32_info.common_magic = MIPS32_COMMON_MAGIC;
mips32_info.isa_mode = MIPS32_ISA_MIPS32;
- init_reg_param(®_params[0], "a0", 32, PARAM_IN_OUT);
- init_reg_param(®_params[1], "a1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "a2", 32, PARAM_OUT);
+ init_reg_param(®_params[0], "r4", 32, PARAM_IN_OUT);
+ init_reg_param(®_params[1], "r5", 32, PARAM_OUT);
+ init_reg_param(®_params[2], "r6", 32, PARAM_OUT);
int row_offset = offset % row_size;
uint8_t *new_buffer = NULL;
return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5);
}
-static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int pic32mx_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
{
uint32_t words_remaining = (count / 4);
uint32_t bytes_remaining = (count & 0x00000003);