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flash/nor/tcl.c: fix flash bank bounds check in 'flash fill' command handler
[openocd.git] / src / flash / nor / stm32f1x.c
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 66a0ee54b7f274b344b4b427defc1555ba06fddd..faada9a6121fa31a897480e1572679b526c45cf9 100644 (file)
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -19,9 +19,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -130,7 +128,7 @@ struct stm32x_flash_bank {
 
 static int stm32x_mass_erase(struct flash_bank *bank);
 static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id);
-static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
                uint32_t offset, uint32_t count);
 
 /* flash bank stm32x <base> <size> 0 0 <target#>
@@ -150,9 +148,6 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
        stm32x_info->register_base = FLASH_REG_BASE_B0;
        stm32x_info->user_bank_size = bank->size;
 
-       /* the stm32l erased value is 0x00 */
-       bank->default_padded_value = 0x00;
-
        return ERROR_OK;
 }
 
@@ -564,7 +559,7 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
        return stm32x_write_options(bank);
 }
 
-static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
                uint32_t offset, uint32_t count)
 {
        struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
@@ -577,45 +572,8 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
        struct armv7m_algorithm armv7m_info;
        int retval = ERROR_OK;
 
-       /* see contrib/loaders/flash/stm32f1x.S for src */
-
        static const uint8_t stm32x_flash_write_code[] = {
-               /* #define STM32_FLASH_SR_OFFSET 0x0C */
-               /* wait_fifo: */
-                       0x16, 0x68,   /* ldr   r6, [r2, #0] */
-                       0x00, 0x2e,   /* cmp   r6, #0 */
-                       0x18, 0xd0,   /* beq   exit */
-                       0x55, 0x68,   /* ldr   r5, [r2, #4] */
-                       0xb5, 0x42,   /* cmp   r5, r6 */
-                       0xf9, 0xd0,   /* beq   wait_fifo */
-                       0x2e, 0x88,   /* ldrh  r6, [r5, #0] */
-                       0x26, 0x80,   /* strh  r6, [r4, #0] */
-                       0x02, 0x35,   /* adds  r5, #2 */
-                       0x02, 0x34,   /* adds  r4, #2 */
-               /* busy: */
-                       0xc6, 0x68,   /* ldr   r6, [r0, #STM32_FLASH_SR_OFFSET] */
-                       0x01, 0x27,   /* movs  r7, #1 */
-                       0x3e, 0x42,   /* tst   r6, r7 */
-                       0xfb, 0xd1,   /* bne   busy */
-                       0x14, 0x27,   /* movs  r7, #0x14 */
-                       0x3e, 0x42,   /* tst   r6, r7 */
-                       0x08, 0xd1,   /* bne   error */
-                       0x9d, 0x42,   /* cmp   r5, r3 */
-                       0x01, 0xd3,   /* bcc   no_wrap */
-                       0x15, 0x46,   /* mov   r5, r2 */
-                       0x08, 0x35,   /* adds  r5, #8 */
-               /* no_wrap: */
-                       0x55, 0x60,   /* str   r5, [r2, #4] */
-                       0x01, 0x39,   /* subs  r1, r1, #1 */
-                       0x00, 0x29,   /* cmp   r1, #0 */
-                       0x02, 0xd0,   /* beq   exit */
-                       0xe5, 0xe7,   /* b     wait_fifo */
-               /* error: */
-                       0x00, 0x20,   /* movs  r0, #0 */
-                       0x50, 0x60,   /* str   r0, [r2, #4] */
-               /* exit: */
-                       0x30, 0x46,   /* mov   r0, r6 */
-                       0x00, 0xbe,   /* bkpt  #0 */
+#include "../../../contrib/loaders/flash/stm32/stm32f1x.inc"
        };
 
        /* flash write code */
@@ -623,12 +581,14 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
-                       sizeof(stm32x_flash_write_code), (uint8_t *)stm32x_flash_write_code);
-       if (retval != ERROR_OK)
+                       sizeof(stm32x_flash_write_code), stm32x_flash_write_code);
+       if (retval != ERROR_OK) {
+               target_free_working_area(target, write_algorithm);
                return retval;
+       }
 
        /* memory buffer */
        while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
@@ -642,7 +602,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
                        LOG_WARNING("no large enough working area available, can't do block memory writes");
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-       };
+       }
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);    /* count (halfword-16bit) */
@@ -695,7 +655,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
        return retval;
 }
 
-static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
+static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
                uint32_t offset, uint32_t count)
 {
        struct target *target = bank->target;
@@ -723,7 +683,7 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
                }
                LOG_INFO("odd number of bytes to write, padding with 0xff");
                buffer = memcpy(new_buffer, buffer, count);
-               buffer[count++] = 0xff;
+               new_buffer[count++] = 0xff;
        }
 
        uint32_t words_remaining = count / 2;
@@ -897,7 +857,7 @@ static int stm32x_probe(struct flash_bank *bank)
                stm32x_info->ppage_size = 4;
                max_flash_size_in_kb = 128;
                break;
-       case 0x422: /* stm32f30x */
+       case 0x422: /* stm32f302/3xb/c */
                page_size = 2048;
                stm32x_info->ppage_size = 2;
                max_flash_size_in_kb = 256;
@@ -905,6 +865,14 @@ static int stm32x_probe(struct flash_bank *bank)
                stm32x_info->option_offset = 6;
                stm32x_info->default_rdp = 0x55AA;
                break;
+       case 0x446: /* stm32f303xD/E */
+               page_size = 2048;
+               stm32x_info->ppage_size = 2;
+               max_flash_size_in_kb = 512;
+               stm32x_info->user_data_offset = 16;
+               stm32x_info->option_offset = 6;
+               stm32x_info->default_rdp = 0x55AA;
+               break;
        case 0x428: /* value line High density */
                page_size = 2048;
                stm32x_info->ppage_size = 4;
@@ -924,8 +892,18 @@ static int stm32x_probe(struct flash_bank *bank)
                stm32x_info->option_offset = 6;
                stm32x_info->default_rdp = 0x55AA;
                break;
-       case 0x440: /* stm32f0x */
-       case 0x444:
+       case 0x438: /* stm32f33x */
+       case 0x439: /* stm32f302x6/8 */
+               page_size = 2048;
+               stm32x_info->ppage_size = 2;
+               max_flash_size_in_kb = 64;
+               stm32x_info->user_data_offset = 16;
+               stm32x_info->option_offset = 6;
+               stm32x_info->default_rdp = 0x55AA;
+               break;
+       case 0x440: /* stm32f05x */
+       case 0x444: /* stm32f03x */
+       case 0x445: /* stm32f04x */
                page_size = 1024;
                stm32x_info->ppage_size = 4;
                max_flash_size_in_kb = 64;
@@ -933,6 +911,15 @@ static int stm32x_probe(struct flash_bank *bank)
                stm32x_info->option_offset = 6;
                stm32x_info->default_rdp = 0x55AA;
                break;
+       case 0x448: /* stm32f07x */
+       case 0x442: /* stm32f09x */
+               page_size = 2048;
+               stm32x_info->ppage_size = 4;
+               max_flash_size_in_kb = 256;
+               stm32x_info->user_data_offset = 16;
+               stm32x_info->option_offset = 6;
+               stm32x_info->default_rdp = 0x55AA;
+               break;
        default:
                LOG_WARNING("Cannot identify target as a STM32 family.");
                return ERROR_FAIL;
@@ -1017,6 +1004,21 @@ COMMAND_HANDLER(stm32x_handle_part_id_command)
 }
 #endif
 
+static const char *get_stm32f0_revision(uint16_t rev_id)
+{
+       const char *rev_str = NULL;
+
+       switch (rev_id) {
+       case 0x1000:
+               rev_str = "1.0";
+               break;
+       case 0x2000:
+               rev_str = "2.0";
+               break;
+       }
+       return rev_str;
+}
+
 static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
 {
        uint32_t dbgmcu_idcode;
@@ -1111,7 +1113,7 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
                break;
 
        case 0x422:
-               device_str = "STM32F30x";
+               device_str = "STM32F302xB/C";
 
                switch (rev_id) {
                case 0x1000:
@@ -1170,21 +1172,64 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
                }
                break;
 
-       case 0x440:
-       case 0x444:
-               device_str = "STM32F0xx";
+       case 0x438:
+               device_str = "STM32F33x";
 
                switch (rev_id) {
                case 0x1000:
-                       rev_str = "1.0";
+                       rev_str = "A";
                        break;
+               }
+               break;
 
-               case 0x2000:
-                       rev_str = "2.0";
+       case 0x439:
+               device_str = "STM32F302x6/8";
+
+               switch (rev_id) {
+               case 0x1000:
+                       rev_str = "A";
+                       break;
+
+               case 0x1001:
+                       rev_str = "Z";
                        break;
                }
                break;
 
+       case 0x444:
+               device_str = "STM32F03x";
+               rev_str = get_stm32f0_revision(rev_id);
+               break;
+
+       case 0x440:
+               device_str = "STM32F05x";
+               rev_str = get_stm32f0_revision(rev_id);
+               break;
+
+       case 0x445:
+               device_str = "STM32F04x";
+               rev_str = get_stm32f0_revision(rev_id);
+               break;
+
+       case 0x446:
+               device_str = "STM32F303xD/E";
+               switch (rev_id) {
+               case 0x1000:
+                       rev_str = "A";
+                       break;
+               }
+               break;
+
+       case 0x448:
+               device_str = "STM32F07x";
+               rev_str = get_stm32f0_revision(rev_id);
+               break;
+
+       case 0x442:
+               device_str = "STM32F09x";
+               rev_str = get_stm32f0_revision(rev_id);
+               break;
+
        default:
                snprintf(buf, buf_size, "Cannot identify target as a STM32F0/1/3\n");
                return ERROR_FAIL;
@@ -1316,10 +1361,10 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
 
        int user_data = optionbyte;
 
-       if (buf_get_u32((uint8_t *)&optionbyte, OPT_ERROR, 1))
+       if (optionbyte >> OPT_ERROR & 1)
                command_print(CMD_CTX, "Option Byte Complement Error");
 
-       if (buf_get_u32((uint8_t *)&optionbyte, OPT_READOUT, 1))
+       if (optionbyte >> OPT_READOUT & 1)
                command_print(CMD_CTX, "Readout Protection On");
        else
                command_print(CMD_CTX, "Readout Protection Off");
@@ -1327,32 +1372,32 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
        /* user option bytes are offset depending on variant */
        optionbyte >>= stm32x_info->option_offset;
 
-       if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDWDGSW, 1))
+       if (optionbyte >> OPT_RDWDGSW & 1)
                command_print(CMD_CTX, "Software Watchdog");
        else
                command_print(CMD_CTX, "Hardware Watchdog");
 
-       if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDRSTSTOP, 1))
+       if (optionbyte >> OPT_RDRSTSTOP & 1)
                command_print(CMD_CTX, "Stop: No reset generated");
        else
                command_print(CMD_CTX, "Stop: Reset generated");
 
-       if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDRSTSTDBY, 1))
+       if (optionbyte >> OPT_RDRSTSTDBY & 1)
                command_print(CMD_CTX, "Standby: No reset generated");
        else
                command_print(CMD_CTX, "Standby: Reset generated");
 
        if (stm32x_info->has_dual_banks) {
-               if (buf_get_u32((uint8_t *)&optionbyte, OPT_BFB2, 1))
+               if (optionbyte >> OPT_BFB2 & 1)
                        command_print(CMD_CTX, "Boot: Bank 0");
                else
                        command_print(CMD_CTX, "Boot: Bank 1");
        }
 
        command_print(CMD_CTX, "User Option0: 0x%02" PRIx8,
-                       (user_data >> stm32x_info->user_data_offset) & 0xff);
+                       (uint8_t)((user_data >> stm32x_info->user_data_offset) & 0xff));
        command_print(CMD_CTX, "User Option1: 0x%02" PRIx8,
-                       (user_data >> (stm32x_info->user_data_offset + 8)) & 0xff);
+                       (uint8_t)((user_data >> (stm32x_info->user_data_offset + 8)) & 0xff));
 
        return ERROR_OK;
 }
@@ -1401,12 +1446,12 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
                else if (strcmp("HWWDG", CMD_ARGV[0]) == 0)
                        optionbyte &= ~(1 << 0);
                else if (strcmp("NORSTSTOP", CMD_ARGV[0]) == 0)
-                       optionbyte &= ~(1 << 1);
-               else if (strcmp("RSTSTNDBY", CMD_ARGV[0]) == 0)
+                       optionbyte |= (1 << 1);
+               else if (strcmp("RSTSTOP", CMD_ARGV[0]) == 0)
                        optionbyte &= ~(1 << 1);
                else if (strcmp("NORSTSTNDBY", CMD_ARGV[0]) == 0)
-                       optionbyte &= ~(1 << 2);
-               else if (strcmp("RSTSTOP", CMD_ARGV[0]) == 0)
+                       optionbyte |= (1 << 2);
+               else if (strcmp("RSTSTNDBY", CMD_ARGV[0]) == 0)
                        optionbyte &= ~(1 << 2);
                else if (stm32x_info->has_dual_banks) {
                        if (strcmp("BOOT0", CMD_ARGV[0]) == 0)
@@ -1567,4 +1612,5 @@ struct flash_driver stm32f1x_flash = {
        .erase_check = default_flash_blank_check,
        .protect_check = stm32x_protect_check,
        .info = get_stm32x_info,
+       .free_driver_priv = default_flash_free_driver_priv,
 };
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