* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#define FLASH_PSIZE_16 (1 << 8)
#define FLASH_PSIZE_32 (2 << 8)
#define FLASH_PSIZE_64 (3 << 8)
-#define FLASH_SNB(a) ((a) << 3)
+/* The sector number encoding is not straight binary for dual bank flash.
+ * Warning: evaluates the argument multiple times */
+#define FLASH_SNB(a) ((((a) >= 12) ? 0x10 | ((a) - 12) : (a)) << 3)
#define FLASH_LOCK (1 << 31)
/* FLASH_SR register bits */
struct stm32x_options option_bytes;
int probed;
bool has_large_mem; /* stm32f42x/stm32f43x family */
+ uint32_t user_bank_size;
};
/* flash bank stm32x <base> <size> 0 0 <target#>
bank->driver_priv = stm32x_info;
stm32x_info->probed = 0;
+ stm32x_info->user_bank_size = bank->size;
return ERROR_OK;
}
return retval;
if (ctrl & FLASH_LOCK) {
- LOG_ERROR("flash not unlocked STM32_FLASH_CR: %x", ctrl);
+ LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
return ERROR_TARGET_FAILURE;
}
return retval;
if (ctrl & OPT_LOCK) {
- LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: %x", ctrl);
+ LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: %" PRIx32, ctrl);
return ERROR_TARGET_FAILURE;
}
return retval;
/* relock registers */
- retval = target_write_u32(target, STM32_FLASH_OPTCR, OPT_LOCK);
+ retval = target_write_u32(target, STM32_FLASH_OPTCR, optiondata | OPT_LOCK);
if (retval != ERROR_OK)
return retval;
static int stm32x_protect_check(struct flash_bank *bank)
{
+ struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
+
+ /* read write protection settings */
+ int retval = stm32x_read_options(bank);
+ if (retval != ERROR_OK) {
+ LOG_DEBUG("unable to read option bytes");
+ return retval;
+ }
+
+ for (int i = 0; i < bank->num_sectors; i++) {
+ if (stm32x_info->option_bytes.protection & (1 << i))
+ bank->sectors[i].is_protected = 0;
+ else
+ bank->sectors[i].is_protected = 1;
+ }
+
return ERROR_OK;
}
struct target *target = bank->target;
int i;
+ assert(first < bank->num_sectors);
+ assert(last < bank->num_sectors);
+
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
To erase a sector, follow the procedure below:
1. Check that no Flash memory operation is ongoing by checking the BSY bit in the
FLASH_SR register
- 2. Set the SER bit and select the sector (out of the 12 sectors in the main memory block)
+ 2. Set the SER bit and select the sector
you wish to erase (SNB) in the FLASH_CR register
3. Set the STRT bit in the FLASH_CR register
4. Wait for the BSY bit to be cleared
static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
{
+ struct target *target = bank->target;
+ struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
+
+ if (target->state != TARGET_HALTED) {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
+ /* read protection settings */
+ int retval = stm32x_read_options(bank);
+ if (retval != ERROR_OK) {
+ LOG_DEBUG("unable to read option bytes");
+ return retval;
+ }
+
+ for (int i = first; i <= last; i++) {
+
+ if (set)
+ stm32x_info->option_bytes.protection &= ~(1 << i);
+ else
+ stm32x_info->option_bytes.protection |= (1 << i);
+ }
+
+ retval = stm32x_write_options(bank);
+ if (retval != ERROR_OK)
+ return retval;
+
return ERROR_OK;
}
-static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
retval = target_write_buffer(target, write_algorithm->address,
sizeof(stm32x_flash_write_code),
- (uint8_t *)stm32x_flash_write_code);
+ stm32x_flash_write_code);
if (retval != ERROR_OK)
return retval;
};
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARMV7M_MODE_ANY;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */
LOG_ERROR("flash memory write protected");
if (error != 0) {
- LOG_ERROR("flash write failed = %08x", error);
+ LOG_ERROR("flash write failed = %08" PRIx32, error);
/* Clear but report errors */
target_write_u32(target, STM32_FLASH_SR, error);
retval = ERROR_FAIL;
return retval;
}
-static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
+static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
static void setup_sector(struct flash_bank *bank, int start, int num, int size)
{
for (int i = start; i < (start + num) ; i++) {
+ assert(i < bank->num_sectors);
bank->sectors[i].offset = bank->size;
bank->sectors[i].size = size;
bank->size += bank->sectors[i].size;
break;
case 0x419:
max_flash_size_in_kb = 2048;
- stm32x_info->has_large_mem = true;
+ break;
+ case 0x423:
+ max_flash_size_in_kb = 256;
+ break;
+ case 0x431:
+ case 0x433:
+ max_flash_size_in_kb = 512;
break;
default:
LOG_WARNING("Cannot identify target as a STM32 family.");
flash_size_in_kb = max_flash_size_in_kb;
}
+ /* if the user sets the size manually then ignore the probed value
+ * this allows us to work around devices that have a invalid flash size register value */
+ if (stm32x_info->user_bank_size) {
+ LOG_INFO("ignoring flash probed value, using configured bank size");
+ flash_size_in_kb = stm32x_info->user_bank_size / 1024;
+ }
+
+ /* only devices with > 1024kB have dual banks */
+ if (flash_size_in_kb > 1024)
+ stm32x_info->has_large_mem = true;
+
LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
/* did we assign flash size? */
setup_sector(bank, 4, 1, 64 * 1024);
/* dynamic memory */
- setup_sector(bank, 4 + 1, MAX(12, num_pages) - 5, 128 * 1024);
+ setup_sector(bank, 4 + 1, MIN(12, num_pages) - 5, 128 * 1024);
if (stm32x_info->has_large_mem) {
static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
{
- uint32_t device_id;
- int printed;
+ uint32_t dbgmcu_idcode;
/* read stm32 device id register */
- int retval = stm32x_get_device_id(bank, &device_id);
+ int retval = stm32x_get_device_id(bank, &dbgmcu_idcode);
if (retval != ERROR_OK)
return retval;
- if ((device_id & 0xfff) == 0x411) {
- printed = snprintf(buf, buf_size, "stm32f2x - Rev: ");
- buf += printed;
- buf_size -= printed;
+ uint16_t device_id = dbgmcu_idcode & 0xfff;
+ uint16_t rev_id = dbgmcu_idcode >> 16;
+ const char *device_str;
+ const char *rev_str = NULL;
- switch (device_id >> 16) {
- case 0x1000:
- snprintf(buf, buf_size, "A");
- break;
+ switch (device_id) {
+ case 0x411:
+ device_str = "STM32F2xx";
- case 0x2000:
- snprintf(buf, buf_size, "B");
- break;
+ switch (rev_id) {
+ case 0x1000:
+ rev_str = "A";
+ break;
- case 0x1001:
- snprintf(buf, buf_size, "Z");
- break;
+ case 0x2000:
+ rev_str = "B";
+ break;
- case 0x2001:
- snprintf(buf, buf_size, "Y");
- break;
+ case 0x1001:
+ rev_str = "Z";
+ break;
- case 0x2003:
- snprintf(buf, buf_size, "X");
- break;
+ case 0x2001:
+ rev_str = "Y";
+ break;
- default:
- snprintf(buf, buf_size, "unknown");
- break;
+ case 0x2003:
+ rev_str = "X";
+ break;
}
- } else if (((device_id & 0xfff) == 0x413) ||
- ((device_id & 0xfff) == 0x419)) {
- printed = snprintf(buf, buf_size, "stm32f4x - Rev: ");
- buf += printed;
- buf_size -= printed;
-
- switch (device_id >> 16) {
- case 0x1000:
- snprintf(buf, buf_size, "A");
- break;
-
- case 0x1001:
- snprintf(buf, buf_size, "Z");
- break;
-
- default:
- snprintf(buf, buf_size, "unknown");
- break;
+ break;
+
+ case 0x413:
+ case 0x419:
+ device_str = "STM32F4xx";
+
+ switch (rev_id) {
+ case 0x1000:
+ rev_str = "A";
+ break;
+
+ case 0x1001:
+ rev_str = "Z";
+ break;
+
+ case 0x1003:
+ rev_str = "Y";
+ break;
}
- } else {
- snprintf(buf, buf_size, "Cannot identify target as a stm32x\n");
+ break;
+
+ case 0x423:
+ case 0x431:
+ case 0x433:
+ device_str = "STM32F4xx (Low Power)";
+
+ switch (rev_id) {
+ case 0x1000:
+ rev_str = "A";
+ break;
+
+ case 0x1001:
+ rev_str = "Z";
+ break;
+ }
+ break;
+
+ default:
+ snprintf(buf, buf_size, "Cannot identify target as a STM32F2/4\n");
return ERROR_FAIL;
}
+ if (rev_str != NULL)
+ snprintf(buf, buf_size, "%s - Rev: %s", device_str, rev_str);
+ else
+ snprintf(buf, buf_size, "%s - Rev: unknown (0x%04x)", device_str, rev_id);
+
return ERROR_OK;
}
Code Review / openocd.git / blobdiff